Verilog and SystemVerilog Gotchas: 101 Common Coding Errors and How to Avoid Them - Hardcover

Sutherland, Stuart; Mills, Don

Hardcover

ISBN 10: 0387717145 ISBN 13: 9780387717142

Verlag: Springer, 2007

Über diesen Titel

Reseña del editor:

This book will help engineers write better Verilog/SystemVerilog design and verification code as well as deliver digital designs to market more quickly. It shows over 100 common coding mistakes that can be made with the Verilog and SystemVerilog languages. Each example explains in detail the symptoms of the error, the languages rules that cover the error, and the correct coding style to avoid the error. The book helps digital design and verification engineers to recognize, and avoid, these common coding mistakes. Many of these errors are very subtle, and can potentially cost hours or days of lost engineering time trying to find and debug them.

Biografía del autor:

Stuart Sutherland is a former editor with the Dictionary of Canadian Biography.

Über diese Auflage

• Verlag: Springer
• Erscheinungsdatum: 2007
• ISBN 10: 0387717145
• ISBN 13: 9780387717142
• Einband: Tapa dura
• Anzahl der Seiten: 240