A SYNERGISTIC APPROACH TO SIGNAL INTEGRITY FOR HIGH–SPEED DIGITAL DESIGN THIS BOOK IS DESIGNED TO PROVIDE CONTEMPORARY READERS WITH AN UNDERSTANDING OF THE EMERGING HIGH–SPEED SIGNAL INTEGRITY ISSUES THAT ARE CREATING ROADBLOCKS IN DIGITAL DESIGN. WRITTEN BY THE FOREMOST EXPERTS ON THE SUBJECT, IT LEVERAGES CONCEPTS AND TECHNIQUES FROM NON–RELATED FIELDS SUCH AS APPLIED PHYSICS AND MICROWAVE ENGINEERING AND APPLIES THEM TO HIGH–SPEED DIGITAL DESIGN CREATING THE OPTIMAL COMBINATION BETWEEN THEORY AND PRACTICAL APPLICATIONS. FOLLOWING AN INTRODUCTION TO THE IMPORTANCE OF SIGNAL INTEGRITY, CHAPTER COVERAGE INCLUDES: ELECTROMAGNETIC FUNDAMENTALS FOR SIGNAL INTEGRITY TRANSMISSION LINE FUNDAMENTALS CROSSTALK NON–IDEAL CONDUCTOR MODELS, INCLUDING SURFACE ROUGHNESS AND FREQUENCY–DEPENDENT INDUCTANCE FREQUENCY–DEPENDENT PROPERTIES OF DIELECTRICS DIFFERENTIAL SIGNALING MATHEMATICAL REQUIREMENTS OF PHYSICAL CHANNELS S–PARAMETERS FOR DIGITAL ENGINEERS NON–IDEAL RETURN PATHS AND VIA RESONANCE I/O CIRCUITS AND MODELS EQUALIZATION MODELING AND BUDGETING OF TIMING JITTER AND NOISE SYSTEM ANALYSIS USING RESPONSE SURFACE MODELING EACH CHAPTER INCLUDES MANY FIGURES AND NUMEROUS EXAMPLES TO HELP READERS RELATE THE CONCEPTS TO EVERYDAY DESIGN AND CONCLUDES WITH PROBLEMS FOR READERS TO TEST THEIR UNDERSTANDING OF THE MATERIAL. ADVANCED SIGNAL INTEGRITY FOR HIGH–SPEED DIGITAL DESIGNS IS SUITABLE AS A TEXTBOOK FOR GRADUATE–LEVEL COURSES ON SIGNAL INTEGRITY, FOR PROGRAMS TAUGHT IN INDUSTRY FOR PROFESSIONAL ENGINEERS, AND AS A REFERENCE FOR THE HIGH–SPEED DIGITAL DESIGNER.
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A synergistic approach to signal integrity for high-speed digital design This book is designed to provide contemporary readers with an understanding of the emerging high-speed signal integrity issues that are creating roadblocks in digital design. Written by the foremost experts on the subject, it leverages concepts and techniques from non-related fields such as applied physics and microwave engineering and applies them to high-speed digital design-creating the optimal combination between theory and practical applications. Following an introduction to the importance of signal integrity, chapter coverage includes: Electromagnetic fundamentals for signal integrity Transmission line fundamentals Crosstalk Non-ideal conductor models, including surface roughness and frequency-dependent inductance Frequency-dependent properties of dielectrics Differential signaling Mathematical requirements of physical channels S-parameters for digital engineers Non-ideal return paths and via resonance I/O circuits and models Equalization Modeling and budgeting of timing jitter and noise System analysis using response surface modeling Each chapter includes many figures and numerous examples to help readers relate the concepts to everyday design and concludes with problems for readers to test their understanding of the material. Advanced Signal Integrity for High-Speed Digital Designs is suitable as a textbook for graduate-level courses on signal integrity, for programs taught in industry for professional engineers, and as a reference for the high-speed digital designer.
STEPHEN H. HALL is a Senior Staff Engineer at Intel Corporation, where he leads a team focused on the research of new modeling and measurement solutions for channel speeds as high as 30Gb/sec. Previously at Intel, he was the lead designer for desktop and server buses on Pentium(r) II, III, and IV based systems, coordinated research in the area of high-speed signaling with multiple universities, led research and development teams in the area of high-speed modeling, and taught signal integrity courses to engineers in two countries. He is also the author of High-Speed Digital System Design (Wiley). HOWARD L. HECK is a Principal Engineer at Intel Corporation, where he leads development of the signaling specifications and solutions for USB 3.0. He also teaches high-speed digital interconnect design at the Oregon Graduate Institute, is a Senior Member of the IEEE, and holds five patents in the area of high-performance packaging and interconnects, with five more pending.
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