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VLSI Planarization: Methods, Models, Implementation: 399 (Mathematics and Its Applications) - Hardcover
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`Altogether, the book is very well written and a good piece of work. All the notions are clearly defined and the proofs are presented in detail. Many pictures illustrate the subjects discussed and help to make things clear and understandable.'
Mathematical Reviews, 98m
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At the beginning we would like to introduce a refinement. The term 'VLSI planarization' means planarization of a circuit of VLSI, Le. the embedding of a VLSI circuit in the plane by different criteria such as the minimum number of connectors, the minimum total length of connectors, the minimum number of over-the-element routes, etc. A connector is designed to connect the broken sections of a net. It can be implemented in different ways depending on the technology. Connectors for a bipolar VLSI are implemented by diffused tun nels, for instance. By over-the-element route we shall mean a connection which intersects the enclosing rectangle of an element (or a cell). The possibility of the construction such connections during circuit planarization is reflected in element models and can be ensured, for example, by the availability of areas within the rectangles where connections may be routed. VLSI planarization is one of the basic stages (others will be discussed below) of the so called topological (in the mathematical sense) approach to VLSI design. This approach does not lie in the direction of the classical approach to automation of VLSI layout design. In the classical approach to computer aided design the placement and routing problems are solved successively. The topological approach, in contrast, allows one to solve both problems at the same time. This is achieved by constructing a planar embedding of a circuit and obtaining the proper VLSI layout on the basis of it.
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- VerlagSpringer
- Erscheinungsdatum1997
- ISBN 10 079234510X
- ISBN 13 9780792345107
- EinbandTapa dura
- SpracheEnglisch
- Anzahl der Seiten196
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VLSI Planarization: Methods, Models, Implementation
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ISBN 10: 079234510X
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VLSI Planarization: Methods, Models, Implementation: 399 (Mathematics and Its Applications, 399)
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VLSI Planarization: Methods, Models, Implementation (Mathematics and Its Applications, 399)
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VLSI Planarization : Methods, Models, Implementation
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VLSI Planarization: Methods, Models, Implementation (Mathematics and Its Applications, 399)
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VLSI Planarization
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ISBN 10: 079234510X
ISBN 13: 9780792345107
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Buch. Zustand: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -At the beginning we would like to introduce a refinement. The term 'VLSI planarization' means planarization of a circuit of VLSI, Le. the embedding of a VLSI circuit in the plane by different criteria such as the minimum number of connectors, the minimum total length of connectors, the minimum number of over-the-element routes, etc. A connector is designed to connect the broken sections of a net. It can be implemented in different ways depending on the technology. Connectors for a bipolar VLSI are implemented by diffused tun nels, for instance. By over-the-element route we shall mean a connection which intersects the enclosing rectangle of an element (or a cell). The possibility of the construction such connections during circuit planarization is reflected in element models and can be ensured, for example, by the availability of areas within the rectangles where connections may be routed. VLSI planarization is one of the basic stages (others will be discussed below) of the so called topological (in the mathematical sense) approach to VLSI design. This approach does not lie in the direction of the classical approach to automation of VLSI layout design. In the classical approach to computer aided design the placement and routing problems are solved successively. The topological approach, in contrast, allows one to solve both problems at the same time. This is achieved by constructing a planar embedding of a circuit and obtaining the proper VLSI layout on the basis of it. 196 pp. Englisch. Bestandsnummer des Verkäufers 9780792345107
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VLSI Planarization: Methods, Models, Implementation (Mathematics and Its Applications, 399)
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VLSI Planarization
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Zustand: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. At the beginning we would like to introduce a refinement. The term VLSI planarization means planarization of a circuit of VLSI, Le. the embedding of a VLSI circuit in the plane by different criteria such as the minimum number of connectors, the minimum to. Bestandsnummer des Verkäufers 447069218
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VLSI Planarization : Methods, Models, Implementation
Verlag:
Springer Netherlands, Springer Netherlands, 1997
ISBN 10: 079234510X
ISBN 13: 9780792345107
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Buch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - At the beginning we would like to introduce a refinement. The term 'VLSI planarization' means planarization of a circuit of VLSI, Le. the embedding of a VLSI circuit in the plane by different criteria such as the minimum number of connectors, the minimum total length of connectors, the minimum number of over-the-element routes, etc. A connector is designed to connect the broken sections of a net. It can be implemented in different ways depending on the technology. Connectors for a bipolar VLSI are implemented by diffused tun nels, for instance. By over-the-element route we shall mean a connection which intersects the enclosing rectangle of an element (or a cell). The possibility of the construction such connections during circuit planarization is reflected in element models and can be ensured, for example, by the availability of areas within the rectangles where connections may be routed. VLSI planarization is one of the basic stages (others will be discussed below) of the so called topological (in the mathematical sense) approach to VLSI design. This approach does not lie in the direction of the classical approach to automation of VLSI layout design. In the classical approach to computer aided design the placement and routing problems are solved successively. The topological approach, in contrast, allows one to solve both problems at the same time. This is achieved by constructing a planar embedding of a circuit and obtaining the proper VLSI layout on the basis of it. Bestandsnummer des Verkäufers 9780792345107
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VLSI Planarization: Methods, Models, Implementation
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