A critical step in the design of a DSP system is to identify for each of its components (DSP kernels) an implementation architecture that provides the desired degree of flexibility/programmability and optimises the area-delay-power parameters. The book covers the entire solution space comprising both hardware multiplier-based and multiplex-less architectures that offer varying degrees of programmability. For each of the implementation styles, several algorithmic and architectural transformations are proposed so as to optimally implement weighted-sum based DSP kernels over the area-display-power space.
VLSI Synthesis of DSP Kernels presents the following:
Die Inhaltsangabe kann sich auf eine andere Ausgabe dieses Titels beziehen.
Anbieter: Lucky's Textbooks, Dallas, TX, USA
Zustand: New. Bestandsnummer des Verkäufers ABLIING23Feb2416190184467
Anzahl: Mehr als 20 verfügbar
Anbieter: Ria Christie Collections, Uxbridge, Vereinigtes Königreich
Zustand: New. In. Bestandsnummer des Verkäufers ria9780792374213_new
Anzahl: Mehr als 20 verfügbar
Anbieter: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Deutschland
Buch. Zustand: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -A critical step in the design of a DSP system is to identify for each of its components an implementation architecture that provides the desired degree of flexibility/programmability and optimises the area-delay-power parameters. This essential book covers architectures that offer varying degrees of programmability. 244 pp. Englisch. Bestandsnummer des Verkäufers 9780792374213
Anzahl: 2 verfügbar
Anbieter: moluna, Greven, Deutschland
Gebunden. Zustand: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. A critical step in the design of a DSP system is to identify for each of its components an implementation architecture that provides the desired degree of flexibility/programmability and optimises the area-delay-power parameters. This essential book cove. Bestandsnummer des Verkäufers 5970149
Anzahl: Mehr als 20 verfügbar
Anbieter: Books Puddle, New York, NY, USA
Zustand: New. pp. 244. Bestandsnummer des Verkäufers 26318092
Anzahl: 4 verfügbar
Anbieter: Majestic Books, Hounslow, Vereinigtes Königreich
Zustand: New. Print on Demand pp. 244 Illus. Bestandsnummer des Verkäufers 7562579
Anzahl: 4 verfügbar
Anbieter: Kennys Bookshop and Art Galleries Ltd., Galway, GY, Irland
Zustand: New. A critical step in the design of a DSP system is to identify for each of its components (DSP kernels) an implementation architecture that provides the desired degree of flexibility/programmability and optimises the area-delay-power parameters. This book covers the entire solution space comprising hardware multiplier-based. Num Pages: 210 pages, biography. BIC Classification: TJF; UY. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly; (UU) Undergraduate. Dimension: 234 x 156 x 14. Weight in Grams: 520. . 2001. Hardback. . . . . Bestandsnummer des Verkäufers V9780792374213
Anzahl: 15 verfügbar
Anbieter: preigu, Osnabrück, Deutschland
Buch. Zustand: Neu. VLSI Synthesis of DSP Kernels | Algorithmic and Architectural Transformations | Sunil D. Sherlekar (u. a.) | Buch | xxiv | Englisch | 2001 | Springer US | EAN 9780792374213 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu Print on Demand. Bestandsnummer des Verkäufers 102549606
Anzahl: 5 verfügbar
Anbieter: Buchpark, Trebbin, Deutschland
Zustand: Sehr gut. Zustand: Sehr gut | Sprache: Englisch | Produktart: Bücher | A critical step in the design of a DSP system is to identify for each of its components (DSP kernels) an implementation architecture that provides the desired degree of flexibility/programmability and optimises the area-delay-power parameters. The book covers the entire solution space comprising both hardware multiplier-based and multiplex-less architectures that offer varying degrees of programmability. For each of the implementation styles, several algorithmic and architectural transformations are proposed so as to optimally implement weighted-sum based DSP kernels over the area-display-power space. VLSI Synthesis of DSP Kernels presents the following: Six different target implementation styles - Programmable DSP-based implementation; Programmable processors with no dedicated hardware multiplier; Implementation using hardware multiplier(s) and adder(s); Distributed Arithmetic (DA)-based implementation; Residue Number System (RNS)-based implementation; and Multiplier-less implementation (using adders and shifters) for fixed coefficient DSP kernels. For each of the implementation styles, description and analysis of several algorithmic and architectural transformations aimed at one or more of reduced area, higher performance and low power; Automated and semi-automated techniques for applying each of these transformations; and Classification of the transformations based on the properties that they exploit and their encapsulation in a design framework. A methodology that uses the framework to systematically explore the application of these transformations depending on the characteristics of the algorithm and the target implementation style. VLSI Synthesis of DSP Kernels is essential reading for designers of both hardware- and software-based DSP systems, developers of IP modules for DSP applications, EDA tools developers, researchers and managers interested in getting a comprehensive overview of current trends and future challenges in optimal implementations of DSP kernels. It will also be suitable for graduate students specialising in the area of VLSI Digital Signal Processing. Bestandsnummer des Verkäufers 1432222/2
Anzahl: 1 verfügbar
Anbieter: Biblios, Frankfurt am main, HESSE, Deutschland
Zustand: New. PRINT ON DEMAND pp. 244. Bestandsnummer des Verkäufers 18318086
Anzahl: 4 verfügbar