In the early days of VLSI, the design of the power distribution for an integrated cir cuit was rather simple. Power distribution --the design of the geometric topology for the network of wires that connect the various power supplies, the widths of the indi vidual segments for each of these wires, the number and location of the power I/O pins around the periphery of the chip --was simple because the chips were simpler. Few available wiring layers forced floorplans that allowed simple, planar (non-over lapping) power networks. Lower speeds and circuit density made the choice of the wire widths easier: we made them just fat enough to avoid resistive voltage drops due to switching currents in the supply network. And we just didn't need enormous num bers of power and ground pins on the package for the chips to work. It's not so simple any more. Increased integration has forced us to focus on reliability concerns such as metal elec tromigration, which affects wire sizing decisions in the power network. Extra metal layers have allowed more flexibility in the topological layout of the power networks.
Die Inhaltsangabe kann sich auf eine andere Ausgabe dieses Titels beziehen.
Anbieter: HPB-Red, Dallas, TX, USA
Hardcover. Zustand: Good. Connecting readers with great books since 1972! Used textbooks may not include companion materials such as access codes, etc. May have some wear or writing/highlighting. We ship orders daily and Customer Service is our top priority! Bestandsnummer des Verkäufers S_342317663
Anzahl: 1 verfügbar
Anbieter: Better World Books, Mishawaka, IN, USA
Zustand: Good. 1st Edition. Former library book; may include library markings. Used book that is in clean, average condition without any missing pages. Bestandsnummer des Verkäufers 15626496-6
Anzahl: 1 verfügbar
Anbieter: PsychoBabel & Skoob Books, Didcot, Vereinigtes Königreich
hardcover. Zustand: Very Good. Zustand des Schutzumschlags: No Dust Jacket. First Edition. Hardcover with black lettering on spine and upper board and contents in almost new condition, showing minimal signs of wear. Previous owner's name on FEP. No dust jacket. T. Used. Bestandsnummer des Verkäufers 249169
Anzahl: 1 verfügbar
Anbieter: BennettBooksLtd, Los Angeles, CA, USA
hardcover. Zustand: New. In shrink wrap. Looks like an interesting title! Bestandsnummer des Verkäufers Q-0792397347
Anzahl: 1 verfügbar
Anbieter: La bataille des livres, Pradinas, Frankreich
Zustand: Très bon. Pour les expéditions internationales, nous consulter au préalable pour l ajustement des frais de port qui pourront peut-être revus à la baisse/ For international shipments, please contact us in advance to adjust shipping costs. | Synthesis of Power Distribution to Manage Signal Integrity in Mixed-Signal Ics| Stanisic, Balsha R.; Rutenbar, Rob A.; Carley, L. Richard | Kluwer, 1996. In-8° cartonné, 206p . Couverture propre . Dos solide. Intérieur frais sans soulignage ou annotation. Exemplaire de bibliothèque : petit code barre en pied de 1re de couv., cotation au dos, rares et discrets petits tampons à l'intérieur de l'ouvrage.Très bon état général pour cet ouvrage. [Ba 52]. Bestandsnummer des Verkäufers FV-5WCJ-7UD4
Anzahl: 1 verfügbar
Anbieter: Lucky's Textbooks, Dallas, TX, USA
Zustand: New. Bestandsnummer des Verkäufers ABLIING23Feb2416190186153
Anzahl: Mehr als 20 verfügbar
Anbieter: GreatBookPrices, Columbia, MD, USA
Zustand: New. Bestandsnummer des Verkäufers 758110-n
Anzahl: Mehr als 20 verfügbar
Anbieter: Grand Eagle Retail, Bensenville, IL, USA
Hardcover. Zustand: new. Hardcover. The move to higher levels of integration has increased the fraction of application-specific integrated circuit (ASIC) designs containing both analog and digital circuits. While the die area for the analog portion of these chips is modest, the design time is often significant. This has motivated the development of automated analog physical design tools for cell-level place-and-route and system-level signal-integrity-routing. To date, there is no tool that has specifically addressed the critical design task of synthesizing the power distribution for the analog portion of an analog or mixed-signal ASIC. This text describes algorithms for analog power distribution synthesis and demonstrates their effectivenes. Existing digital power bus synthesis algorithms have failed to address critical concerns for analog circuitry, thus yielding unacceptable results. These tools synthesize only the bus component of power distribution networks and only consider simplified DC aspects of macros and buses. This work addresses power distribution synthesis for mixed-signal integrated circuits.Several key challenges in power distribution design are identified and automated methods to overcome them are described. The text presents a formulation for the analog power distribution synthesis problem which synthesizes both the power busses power I/O cell assignment by evaluating DC, AC, and transient interaction between the macros, busses, chip substrate, and package. Furthermore, algorithms are introduced which simultaneously optimize power I/O cell assignment, macro cell substrate coupling, power bus topology selection and power bus sizing. The book should be of interest to CAD designers and researchers specializing in physical design, modelling and circuit synthesis. Power distribution --the design of the geometric topology for the network of wires that connect the various power supplies, the widths of the indi vidual segments for each of these wires, the number and location of the power I/O pins around the periphery of the chip --was simple because the chips were simpler. Shipping may be from multiple locations in the US or from the UK, depending on stock availability. Bestandsnummer des Verkäufers 9780792397342
Anbieter: GreatBookPrices, Columbia, MD, USA
Zustand: As New. Unread book in perfect condition. Bestandsnummer des Verkäufers 758110
Anzahl: Mehr als 20 verfügbar
Anbieter: Ria Christie Collections, Uxbridge, Vereinigtes Königreich
Zustand: New. In. Bestandsnummer des Verkäufers ria9780792397342_new
Anzahl: Mehr als 20 verfügbar