Systemverilog for Design: A Guide to Using Systemverilog for Hardware Design and Modeling - Hardcover

Sutherland, Stuart; Davidmann, Simon; Flake, Peter

 
9781402075308: Systemverilog for Design: A Guide to Using Systemverilog for Hardware Design and Modeling
Hardcover
ISBN 10: 1402075308 ISBN 13: 9781402075308
Verlag: Springer-Verlag New York Inc., 2003

Inhaltsangabe

SystemVerilog is a rich set of extensions to the IEEE 1364-2001 Verilog Hardware Description Language (Verilog HDL). These extensions address two major aspects of HDL based design. First, modeling very large designs with concise, accurate, and intuitive code. Second, writing high-level test programs to efficiently and effectively verify these large designs. This book, "SystemVerilog for Design", addresses the first aspect of the SystemVerilog extensions to Verilog. Important modeling features are presented, such as two-state data types, enumerated types, user-defined types, structures, unions, and interfaces. Emphasis is placed on the proper usage of these enhancements for simulation and synthesis. A companion to this book, "SystemVerilog for Verification", covers the second aspect of SystemVerilog.

Die Inhaltsangabe kann sich auf eine andere Ausgabe dieses Titels beziehen.

Críticas

The development of the SystemVerilog language makes iteasier to produce more efficient and concise descriptions of complexhardware designs. The authors of this book have been involved with thedevelopment of the language from the beginning, and who is better tolearn from than those involved from day one?'Greg Spirakis, Vice President of Design Technology, IntelCorporationAs a company committed to open standards', and as one of theearly adopters of Verilog, Sun has been a driving force in thestandardization effort for SystemVerilog from its inception.SystemVerilog can significantly improve the productivity of designersin the coming years, and this book is a comprehensive reference textfor engineers who want to learn about SystemVerilog for their nextgeneration designs.'Sunil Joshi, Vice President of Software Technologies andComputer Resources, Sun Microsystems, Inc.SystemVerilog directly addresses the need for efficient andpowerful modeling essential to support the complexity, size, and scaleof next generation hardware designs. This book explains how to useSystemVerilog effectively and provides numerous examples to illustratehow each of the language constructs can best be utilized.'Chris Malachowsky, Co-Founder and Vice President of Hardware, NVIDIA Corporation "The development of the SystemVerilog language makes it easier to produce more efficient and concise descriptions of complex hardware designs. The authors of this book have been involved with the development of the language from the beginning, and who is better to learn from than those involved from day one?" (Greg Spirakis, Vice President of Design Technology, Intel Corporation) "As a company committed to open standards', and as one of the early adopters of Verilog, Sun has been a driving force in the standardization effort for SystemVerilog from its inception. SystemVerilog can significantly improve the productivity of designers in the coming years, and this book is a comprehensive reference text for engineers who want to learn about SystemVerilog for their next generation designs." (Sunil Joshi, Vice President of Software Technologies and Computer Resources, Sun Microsystems, Inc.) "SystemVerilog directly addresses the need for efficient and powerful modeling essential to support the complexity, size, and scale of next generation hardware designs. This book explains how to use SystemVerilog effectively and provides numerous examples to illustrate how each of the language constructs can best be utilized." (Chris Malachowsky, Co-Founder and Vice President of Hardware, NVIDIA Corporation)

Reseña del editor

SystemVerilog is a rich set of extensions to the IEEE 1364-2001 Verilog Hardware Description Language (Verilog HDL). These extensions address two major aspects of HDL based design. First, modeling very large designs with concise, accurate, and intuitive code. Second, writing high-level test programs to efficiently and effectively verify these large designs. This book, SystemVerilog for Design, addresses the first aspect of the SystemVerilog extensions to Verilog. Important modeling features are presented, such as two-state data types, enumerated types, user-defined types, structures, unions, and interfaces. Emphasis is placed on the proper usage of these enhancements for simulation and synthesis. A companion to this book, SystemVerilog for Verification, covers the second aspect of SystemVerilog.

„Über diesen Titel“ kann sich auf eine andere Ausgabe dieses Titels beziehen.

Verlag
Springer-Verlag New York Inc.
Erscheinungsdatum
2003
Sprache
Englisch
ISBN 10 
1402075308
ISBN 13 
9781402075308
Einband
Tapa dura
Anzahl der Seiten
402
Kontakt zum Hersteller
Nicht verfügbar
Verantwortliche Person
CMN Printpool Inh. Mathis Neumann
https://www.also.com/ec/cms5/en_6000/6000/index.jsp

Friedrich-Karl-Str. 9
Hamburg
Deutschland