Decoupling capacitors are often utilized to mitigate power distribution noise, maintaining the impedance of a power distribution system below the target specifications in the range of operating frequencies.
This book presents power distribution grids with on-chip decoupling capacitors and discusses the design of decoupling capacitors for power distribution networks with multiple supply voltages. To be effective, on-chip decoupling capacitors should be located inside the effective radius. This book develops a design methodology for placing on-chip decoupling capacitors in this manner and presents two criteria to estimate the minimum required on-chip decoupling capacitance. Techniques and algorithms for the computer-aided design and analysis of on-chip power distribution networks are also described; however, the emphasis of the book is on developing circuit intuition and understanding the principles that govern the design and operation of power distribution systems.
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Eby G. Friedman was born in Jersey City, New Jersey in 1957. He received the B. S. degree from Lafayette College, Easton, Pennsylvania in 1979, and the M. S. and Ph. D. degrees from the University of California, Irvine, in 1981 and 1989, respectively, all in electrical engineering. He was with Philips Gloeilampen Fabrieken, Eindhoven, The Netherlands, in 1978 where he worked on the design of bipolar differential amplifiers. From 1979 to 1983, he was employed by Hughes Aircraft Company, Newport Beach, California, working in the areas of custom IC design, software compatible gate array design, one- and two-dimensional device modeling, circuit modeling, and double level metal process development. From 1983 to 1991, he was employed at Hughes Aircraft Company, Carlsbad, California, rising to the position of Manager of the Signal Processing Design and Test Department, responsible for the design and test of high performance VLSI/VHSIC CMOS and BIMOS digital and analog IC's, the development of supporting design and test methodologies and CAD tools, functional and parametric test, and the development of high performance and high resolution DSP and oversampled systems. Dr. Friedman has been with the Department of Electrical and Computer Engineering at the University of Rochester, Rochester, New York, since 1991, where he is a Distinguished Professor and Director of the High Performance VLSI/IC Design and Analysis Laboratory. He previously was the Director of the Center for Electronic Imaging Systems. He is also a Visiting Professor at the Technion - Israel Institute of Technology. He also directs the Technion Advanced Circuits Research Center (ACRC). His current research and teaching interests are in high performance synchronous digital and mixed-signal microelectronic design and analysis with application to high speed portable processors and low power wireless communications. He has authored twelve book chapters and many papers in the fields of high speedand low power CMOS design techniques, interconnect and substrate noise, pipelining and retiming, three-dimensional integration, and the theory and application of power and synchronous clock distribution networks. Dr. Friedman has also authored or edited sixteen books, including Clock Distribution Networks in VLSI Circuits and Systems (IEEE Press, 1995), High Performance Clock Distribution Networks (Kluwer Academic Publishers, 1997), Analog Design Issues in Digital VLSI Circuits and Systems (Kluwer Academic Publishers, 1997), Timing Optimization through Clock Skew Scheduling (Kluwer Academic Publishers, 2000 and 2009), On-Chip Inductance in High Speed Integrated Circuits (Kluwer Academic Publishers, 2001), Power Distribution Networks in High Speed Integrated Circuits (Kluwer Academic Publishers, 2004), Multi-Voltage CMOS Circuit Design (John Wiley & Sons Press, 2006), Power Distribution Networks with On-Chip Decoupling Capacitors (Springer Verlag, 2008 and 2011), Three-Dimensional Integrated Circuit Design (Morgan Kaufmann, 2009), and High Performance Integrated Circuit Design (McGraw-Hill Publishers, 2012). Dr. Friedman is a Fellow of the IEEE, Chair of the steering committee for the IEEE Transactions on Very Large Scale Integration (VLSI) Systems, a Regional Editor of the Journal of Circuits, Systems and Computers, a Member of the editorial board of the Analog Integrated Circuits and Signal Processing, Microelectronics Journal, Journal of Low Power Electronics , and Journal of VLSI Signal Processing, and a Member of the technical program committee of a number of conferences. He has been Editor-In-Chief of the IEEE Transactions on Very Large Scale Integration (VLSI) Systems, a Distinguished Lecturer of the IEEE CAS Society, a Member of the editorial board of the Proceedings of the IEEE and IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, a member of the IEEE Circuits and Systems (CAS) Society Board of Governors, CAS liaison to the I
Power Distribution Networks with On-Chip Decoupling Capacitors is dedicated to distributing power in high speed, high complexity integrated circuits with power levels exceeding tens of watts and the power supply below a volt. The book provides insight and intuition into the behavior and design of integrated circuit-based power distribution systems.
The book has three primary objectives. The first is to describe the impedance characteristics of the overall power distribution system, from the voltage regulator through the printed circuit board and package onto the integrated circuit to the power terminals of the on-chip circuitry. The second is to discuss the inductive characteristics of on-chip power distribution grids and the related circuit behavior of these structures. The third objective is to present design methodologies for effciently placing on-chip decoupling capacitors in nanoscale integrated circuits.
Power Distribution Networks with On-Chip Decoupling Capacitors is a reference for professional engineers in the fields of circuits and systems and computer-aided design.
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Taschenbuch. Zustand: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book provides insight into the behavior and design of power distribution systems for high speed, high complexity integrated circuits. Also presented are criteria for estimating minimum required on-chip decoupling capacitance. Techniques and algorithms for computer-aided design of on-chip power distribution networks are also described; however, the emphasis is on developing circuit intuition and understanding the principles that govern the design and operation of power distribution systems. 548 pp. Englisch. Bestandsnummer des Verkäufers 9781441943996
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Zustand: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. The first in the areaIt is comprehensive, advanced and applicableDiscusses a current issue in engineeringThe ideas it contains are easy to implementThis book provides insight into the behavior and design of power distribut. Bestandsnummer des Verkäufers 4174749
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Taschenbuch. Zustand: Neu. Power Distribution Networks with On-Chip Decoupling Capacitors | Mikhail Popovich (u. a.) | Taschenbuch | xxxii | Englisch | 2010 | Springer | EAN 9781441943996 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu. Bestandsnummer des Verkäufers 107219358
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Taschenbuch. Zustand: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Decoupling capacitors are often utilized to mitigate power distribution noise, maintaining the impedance of a power distribution system below the target specifications in the range of operating frequencies.This book presents power distribution grids with on-chip decoupling capacitors and discusses the design of decoupling capacitors for power distribution networks with multiple supply voltages. To be effective, on-chip decoupling capacitors should be located inside the effective radius. This book develops a design methodology for placing on-chip decoupling capacitors in this manner and presents two criteria to estimate the minimum required on-chip decoupling capacitance. Techniques and algorithms for the computer-aided design and analysis of on-chip power distribution networks are also described; however, the emphasis of the book is on developing circuit intuition and understanding the principles that govern the design and operation of power distribution systems.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 548 pp. Englisch. Bestandsnummer des Verkäufers 9781441943996
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Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - Power Distribution Networks with On-Chip Decoupling Capacitors is dedicated to distributing power in high speed, high complexity integrated circuits with power levels exceeding tens of watts and the power supply below a volt. The book provides insight and intuition into the behavior and design of integrated circuit-based power distribution systems.The book has three primary objectives. The first is to describe the impedance characteristics of the overall power distribution system, from the voltage regulator through the printed circuit board and package onto the integrated circuit to the power terminals of the on-chip circuitry. The second is to discuss the inductive characteristics of on-chip power distribution grids and the related circuit behavior of these structures. The third objective is to present design methodologies for effciently placing on-chip decoupling capacitors in nanoscale integrated circuits.Power Distribution Networks with On-Chip Decoupling Capacitors is a reference for professional engineers in the fields of circuits and systems and computer-aided design. Bestandsnummer des Verkäufers 9781441943996
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