This book presents the perspective of the project on a Paradigm Unifying System Specification Environments for proven Electronic design (PUS SEE) as conceived in the course of the research during 2002 -2003. The initial statement of the research was formulated as follows: The objective of PUSSEE is to introduce the formal proof of system properties throughout a modular system design methodology that integrates sub-systems co-verification with system refinement and reusability of virtual system components. This will be done by combining the UML and B languages to allow the verification of system specifications through the composition of proven sub-systems (in particular interfaces, using the VSIAISLIF standard). The link of B with C, VHDL and SystemC will extend the correct-by-construction design process to lower system-on-chip (SoC) development stages. Prototype tools will be developed for the code generation from UML and B, and existing B verification tools will be extended to supportIP reuse, according to the VSI Alliance work. The methodology and tools will be validated through the development of three industrial applications: a wireless mobile terminal-a telecom system-on-chip based on HIPERLANI2 protocol and an anti-collision module for automobiles. The problem was known to be hard and the scope ambitious. But the seventeen chapters that follow, describing the main results obtained demonstrate the success of the research, acknowledged by the European reviewers. They are released to allow the largest audience to learn and take benefit of.
Die Inhaltsangabe kann sich auf eine andere Ausgabe dieses Titels beziehen.
This book presents the perspective of the project on a Paradigm Unifying System Specification Environments for proven Electronic design (PUS SEE) as conceived in the course of the research during 2002 -2003. The initial statement of the research was formulated as follows: The objective of PUSSEE is to introduce the formal proof of system properties throughout a modular system design methodology that integrates sub-systems co-verification with system refinement and reusability of virtual system components. This will be done by combining the UML and B languages to allow the verification of system specifications through the composition of proven sub-systems (in particular interfaces, using the VSIAISLIF standard). The link of B with C, VHDL and SystemC will extend the correct-by-construction design process to lower system-on-chip (SoC) development stages. Prototype tools will be developed for the code generation from UML and B, and existing B verification tools will be extended to support IP reuse, according to the VSI Alliance work. The methodology and tools will be validated through the development of three industrial applications: a wireless mobile terminal-a telecom system-on-chip based on HIPERLANI2 protocol and an anti-collision module for automobiles. The problem was known to be hard and the scope ambitious. But the seventeen chapters that follow, describing the main results obtained demonstrate the success of the research, acknowledged by the European reviewers. They are released to allow the largest audience to learn and take benefit of.
UML-B Specification for Proven Embedded Systems Design presents the perspective of the project on a Paradigm Unifying System Specification Environments for proven Electronic design (PUSSEE) as conceived in the course of the research during 2002 - 2003. The goal of the research in this project was to introduce the formal proof of system properties throughout a modular system design methodology that integrates sub-systems co-verification with system refinement and reusability of virtual system components. This is done by combining the formal and informal means of specification by way of the UML and B languages to allow the verification of system specifications through the composition of proven sub-systems (with some particular attention to interfaces, in line with the VSIA/SLIF approach). The link of B with C, VHDL and SystemC extends the correct-by-construction design process to lower system-on-chip (SoC) development stages. The production of proven embedded software is therefore complemented by the production of proven hardware. Prototype tools have been developed for the code generation from UML and B, and existing B verification tools will be extended to support IP reuse, according to the VSIA recommendations. The methodology and tools were validated through the development of three industrial applications: a wireless mobile terminal a telecom system-on-chip based on HIPERLAN/2 protocol and an anti-collision module for automobiles. The problem was known to be hard and the scope ambitious. But the seventeen chapters of UML-B Specification for Proven Embedded Systems Design, describing the main results obtained demonstrate the success of the research, acknowledged by the European reviewers. They are released to allow the largest audience including the various sectors of industry's system design engineers, university teachers and researchers. They will hopefully convince skeptical professionals that formal approaches can now cope with industrial strength problems.
„Über diesen Titel“ kann sich auf eine andere Ausgabe dieses Titels beziehen.
EUR 29,78 für den Versand von Vereinigtes Königreich nach Deutschland
Versandziele, Kosten & DauerGratis für den Versand innerhalb von/der Deutschland
Versandziele, Kosten & DauerAnbieter: moluna, Greven, Deutschland
Zustand: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Presents the perspective of the project on a Paradigm Unifying System Specification Environments for proven Electronic design (PUSSEE)Shows the success of research, as acknowledged by the European reviewersIntroduces the formal proof of sys. Bestandsnummer des Verkäufers 4175581
Anzahl: Mehr als 20 verfügbar
Anbieter: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Deutschland
Taschenbuch. Zustand: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book presents the perspective of the project on a Paradigm Unifying System Specification Environments for proven Electronic design (PUS SEE) as conceived in the course of the research during 2002 -2003. The initial statement of the research was formulated as follows: The objective of PUSSEE is to introduce the formal proof of system properties throughout a modular system design methodology that integrates sub-systems co-verification with system refinement and reusability of virtual system components. This will be done by combining the UML and B languages to allow the verification of system specifications through the composition of proven sub-systems (in particular interfaces, using the VSIAISLIF standard). The link of B with C, VHDL and SystemC will extend the correct-by-construction design process to lower system-on-chip (SoC) development stages. Prototype tools will be developed for the code generation from UML and B, and existing B verification tools will be extended to support IP reuse, according to the VSI Alliance work. The methodology and tools will be validated through the development of three industrial applications: a wireless mobile terminal-a telecom system-on-chip based on HIPERLANI2 protocol and an anti-collision module for automobiles. The problem was known to be hard and the scope ambitious. But the seventeen chapters that follow, describing the main results obtained demonstrate the success of the research, acknowledged by the European reviewers. They are released to allow the largest audience to learn and take benefit of. 312 pp. Englisch. Bestandsnummer des Verkäufers 9781441952561
Anzahl: 2 verfügbar
Anbieter: AHA-BUCH GmbH, Einbeck, Deutschland
Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book presents the perspective of the project on a Paradigm Unifying System Specification Environments for proven Electronic design (PUS SEE) as conceived in the course of the research during 2002 -2003. The initial statement of the research was formulated as follows: The objective of PUSSEE is to introduce the formal proof of system properties throughout a modular system design methodology that integrates sub-systems co-verification with system refinement and reusability of virtual system components. This will be done by combining the UML and B languages to allow the verification of system specifications through the composition of proven sub-systems (in particular interfaces, using the VSIAISLIF standard). The link of B with C, VHDL and SystemC will extend the correct-by-construction design process to lower system-on-chip (SoC) development stages. Prototype tools will be developed for the code generation from UML and B, and existing B verification tools will be extended to supportIP reuse, according to the VSI Alliance work. The methodology and tools will be validated through the development of three industrial applications: a wireless mobile terminal-a telecom system-on-chip based on HIPERLANI2 protocol and an anti-collision module for automobiles. The problem was known to be hard and the scope ambitious. But the seventeen chapters that follow, describing the main results obtained demonstrate the success of the research, acknowledged by the European reviewers. They are released to allow the largest audience to learn and take benefit of. Bestandsnummer des Verkäufers 9781441952561
Anzahl: 1 verfügbar
Anbieter: Books Puddle, New York, NY, USA
Zustand: New. pp. ix + 300. Bestandsnummer des Verkäufers 263095688
Anzahl: 4 verfügbar
Anbieter: Biblios, Frankfurt am main, HESSE, Deutschland
Zustand: New. PRINT ON DEMAND pp. ix + 300. Bestandsnummer des Verkäufers 183095682
Anzahl: 4 verfügbar
Anbieter: Majestic Books, Hounslow, Vereinigtes Königreich
Zustand: New. Print on Demand pp. ix + 300. Bestandsnummer des Verkäufers 5800791
Anzahl: 4 verfügbar
Anbieter: Mispah books, Redhill, SURRE, Vereinigtes Königreich
Paperback. Zustand: Like New. Like New. book. Bestandsnummer des Verkäufers ERICA790144195256X6
Anzahl: 1 verfügbar
Anbieter: Revaluation Books, Exeter, Vereinigtes Königreich
Paperback. Zustand: Brand New. 300 pages. 9.25x6.00x0.71 inches. In Stock. Bestandsnummer des Verkäufers zk144195256X
Anzahl: 1 verfügbar