A One-Semester Course in Modeling of VSLI Interconnections (Electronic Circuits and Semiconductor Devices Collection) - Softcover

Goel, Ashok

 
9781606505120: A One-Semester Course in Modeling of VSLI Interconnections (Electronic Circuits and Semiconductor Devices Collection)
Softcover
ISBN 10: 1606505122 ISBN 13: 9781606505120
Verlag: Momentum Press, 2015

Inhaltsangabe

Quantitative understanding of the parasitic capacitances and inductances, and the resultant propagation delays and crosstalk phenomena associated with the metallic interconnections on the very large scale integrated (VLSI) circuits has become extremely important for the optimum design of the state-of-the-art integrated circuits.

More than 65 percent of the delays on the integrated circuit chip occur in the interconnections and not in the transistors on the chip. Mathematical techniques to model the parasitic capacitances, inductances, propagation delays, crosstalk noise, and electromigration-induced failure associated with the interconnections in the realistic high-density environment on a chip will be discussed.

This book includes an overview of the future interconnection technologies for the nanotechnology circuits.

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Über die Autorin bzw. den Autor

Associate Professor, Michigan Technological University

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Verlag
Momentum Press
Erscheinungsdatum
2015
Sprache
Englisch
ISBN 10 
1606505122
ISBN 13 
9781606505120
Einband
Taschenbuch
Anzahl der Seiten
362
Kontakt zum Hersteller
Mare Nostrum Group B.V.
gpsr@mare-nostrum.co.uk

Doelen 72
Breda
4831 GR
Niederlande