A Pipelined Multi-Core Machine with Operating System Support: Hardware Implementation and Correctness Proof (Theoretical Computer Science and General Issues, Band 9999) - Softcover

Lutsyk, Petro; Oberhauser, Jonas; Paul, Wolfgang J.

Softcover

ISBN 10: 3030432424 ISBN 13: 9783030432423

Verlag: Springer, 2020

Inhaltsangabe

This work is building on results from the book named “A Pipelined Multi-core MIPS Machine: Hardware Implementation and Correctness” by M. Kovalev, S.M. Müller, and W.J. Paul, published as LNCS 9000 in 2014.

It presents, at the gate level, construction and correctness proof of a multi-core machine with pipelined processors and extensive operating system support with the following features:

• MIPS instruction set architecture (ISA) for application and for system programming

• cache coherent memory system

• store buffers in front of the data caches

• interrupts and exceptions

• memory management units (MMUs)

• pipelined processors: the classical five-stage pipeline is extended by two pipeline

stages for address translation

• local interrupt controller (ICs) supporting inter-processor interrupts (IPIs)

• I/O-interrupt controller and a disk

 

Über diesen Titel

Über die Autorin bzw. den Autor

Prof. Dr. Wolfgang J. Paul received his Ph.D. in 1973 from Saarland University. He did a postdoc in Cornell, and worked as a professor of mathematics in Bielefeld and in a research role with IBM in San Jose. He was appointed a professor in Saarbrücken in 1986, where he is now the Head of the Institute for Computer Architecture and Parallel Computing. He shared the Leibniz Prize in 1987 with Günter Hotz and Kurt Mehlhorn. He was the scientific director of the Verisoft project. His research interests include hardware design, computer architecture, and the formal verification of processors and microkernels. Dr. Christoph Baumann received his Ph.D. in 2014 from Saarland University. As a staff member of the Institute for Computer Architecture and Parallel Computing he worked on the avionics component of the Verisoft XT project. Currently he is doing a postdoc at the KTH Royal Institute of Technology in Stockholm, working in the PROSPER and HASPOC projects on provably secure execution platforms for embedded systems. His research interests include the formal specification of modern processors, the formal verification of real-world operating systems, and information flow security. Petro Lutsyk, M.Sc., is a scientific staff member of the Institute for Computer Architecture and Parallel Computing. His research interests include hardware design, hardware-assisted virtualization, and formal verification of hardware and low-level software. Dr. Sabine Schmaltz received her Ph.D. in 2013 from Saarland University where she was a staff member of the Institute for Computer Architecture and Parallel Computing. She is currently creating a sewing community website while being a full-time caregiver for her son. Her research interests include operating systems, hypervisors, hardware architectures, compilers, formal verification, formal theories of systems, pervasive formal verification, and applied functional programming.

Von der hinteren Coverseite

This work is building on results from the book named “A Pipelined Multi-core MIPS Machine: Hardware Implementation and Correctness” by M. Kovalev, S.M. Müller, and W.J. Paul, published as LNCS 9000 in 2014.

It presents, at the gate level, construction and correctness proof of a multi-core machine with pipelined processors and extensive operating system support with the following features:

• MIPS instruction set architecture (ISA) for application and for system programming

• cache coherent memory system

• store buffers in front of the data caches

• interrupts and exceptions

• memory management units (MMUs)

• pipelined processors: the classical five-stage pipeline is extended by two pipeline

stages for address translation

• local interrupt controller (ICs) supporting inter-processor interrupts (IPIs)

• I/O-interrupt controller and a disk

 

Details zur Ausgabe

• Verlag: Springer
• Erscheinungsdatum: 2020
• Sprache: Englisch
• ISBN 10: 3030432424
• ISBN 13: 9783030432423
• Einband: Taschenbuch
• Auflage: 1
• Anzahl der Seiten: 644
• Kontakt zum Hersteller: ProductSafety@springernature.com; ProductSafety@springernature.com; ; Poststr. 9; Darmstadt; 64293; Deutschland