EUR 3,95 für den Versand innerhalb von/der Deutschland
Versandziele, Kosten & DauerGratis für den Versand innerhalb von/der Deutschland
Versandziele, Kosten & DauerAnbieter: AHA-BUCH GmbH, Einbeck, Deutschland
Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - Digital filtering in VLSI.- Two processor scheduling is in NC.- Breaking symmetry in synchronous networks.- Parallel ear decomposition search (EDS) and st-numbering in graphs.- A unifying framework for systolic designs.- Optimal tradeoffs for addition on systolic arrays.- On the connection between hexagonal and unidirectional rectangular systolic arrays.- Lower bounds for sorting on mesh-connected architectures.- Diogenes, circa 1986 o o o.- Nonsequential computation and laws of nature.- Linear algorithms for two CMOS layout problems.- Some new results on a restricted channel routing problem.- Efficient modular design of TSC checkers for m-out-of-2m codes.- Vlsi algorithms and pipelined architectures for solving structured linear system.- A high-performance single-chip vlsi signal processor architecture.- Exploiting hierarchy in VLSI design.- A polynomial algorithm for recognizing images of polyhedra.- Parallel tree techniques and code optimization.- AT2-optimal galois field multiplier for VLSI.- Linear and book embeddings of graphs.- Efficient parallel evaluation of straight-line code and arithmetic circuits.- A logarithmic boolean time algorithm for parallel polynomial division.- A polynomial algorithm for recognizing small cutwidth in hypergraphs.- A generalized topological sorting problem.- Combinational static CMOS networks.- Fast and efficient parallel linear programming and linear least squares computations.- On the time required to sum n semigroup elements on a parallel machine with simultaneous writes.- A comparative study of concurrency control methods in B-trees.- Generalized river routing ¿ Algorithms and performance bounds. Bestandsnummer des Verkäufers 9783540167662
Anzahl: 1 verfügbar
Anbieter: moluna, Greven, Deutschland
Zustand: New. Digital filtering in VLSI.- Two processor scheduling is in NC.- Breaking symmetry in synchronous networks.- Parallel ear decomposition search (EDS) and st-numbering in graphs.- A unifying framework for systolic designs.- Optimal tradeoffs for addition on sy. Bestandsnummer des Verkäufers 4883182
Anzahl: Mehr als 20 verfügbar
Anbieter: Ria Christie Collections, Uxbridge, Vereinigtes Königreich
Zustand: New. In. Bestandsnummer des Verkäufers ria9783540167662_new
Anzahl: Mehr als 20 verfügbar
Anbieter: ralfs-buecherkiste, Herzfelde, MOL, Deutschland
Paperback/ broschiert. Zustand: Gut. 328 S. Computerwissenschaft Informatics Algorithmus Algorithmen Mathematics Mathematik Architektur Guter Zustand/ Good With figures. Ex-Library. Brownish paper. ha1061075 Sprache: Englisch Gewicht in Gramm: 600. Bestandsnummer des Verkäufers 289233
Anzahl: 1 verfügbar
Anbieter: GuthrieBooks, Spring Branch, TX, USA
Paperback. Zustand: Very Good. 0387167668 Ex-library paperback in very nice condition with the usual markings and attachments. Bestandsnummer des Verkäufers UTD14a2291
Anzahl: 1 verfügbar
Anbieter: California Books, Miami, FL, USA
Zustand: New. Bestandsnummer des Verkäufers I-9783540167662
Anzahl: Mehr als 20 verfügbar
Anbieter: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Deutschland
Taschenbuch. Zustand: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Digital filtering in VLSI.- Two processor scheduling is in NC.- Breaking symmetry in synchronous networks.- Parallel ear decomposition search (EDS) and st-numbering in graphs.- A unifying framework for systolic designs.- Optimal tradeoffs for addition on systolic arrays.- On the connection between hexagonal and unidirectional rectangular systolic arrays.- Lower bounds for sorting on mesh-connected architectures.- Diogenes, circa 1986 o o o.- Nonsequential computation and laws of nature.- Linear algorithms for two CMOS layout problems.- Some new results on a restricted channel routing problem.- Efficient modular design of TSC checkers for m-out-of-2m codes.- Vlsi algorithms and pipelined architectures for solving structured linear system.- A high-performance single-chip vlsi signal processor architecture.- Exploiting hierarchy in VLSI design.- A polynomial algorithm for recognizing images of polyhedra.- Parallel tree techniques and code optimization.- AT2-optimal galois field multiplier for VLSI.- Linear and book embeddings of graphs.- Efficient parallel evaluation of straight-line code and arithmetic circuits.- A logarithmic boolean time algorithm for parallel polynomial division.- A polynomial algorithm for recognizing small cutwidth in hypergraphs.- A generalized topological sorting problem.- Combinational static CMOS networks.- Fast and efficient parallel linear programming and linear least squares computations.- On the time required to sum n semigroup elements on a parallel machine with simultaneous writes.- A comparative study of concurrency control methods in B-trees.- Generalized river routing ¿ Algorithms and performance bounds. 340 pp. Englisch. Bestandsnummer des Verkäufers 9783540167662
Anzahl: 2 verfügbar
Anbieter: Chiron Media, Wallingford, Vereinigtes Königreich
PF. Zustand: New. Bestandsnummer des Verkäufers 6666-IUK-9783540167662
Anzahl: 10 verfügbar
Anbieter: Lucky's Textbooks, Dallas, TX, USA
Zustand: New. Bestandsnummer des Verkäufers ABLIING23Mar3113020161156
Anzahl: Mehr als 20 verfügbar