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Synthesis of High Performance Low Power CMOS Circuit Design: Power Optimization Approach - Softcover

Swami, Neelam

 
9783659177965: Synthesis of High Performance Low Power CMOS Circuit Design: Power Optimization Approach
Softcover
ISBN 10: 3659177962 ISBN 13: 9783659177965
Verlag: LAP LAMBERT Academic Publishing, 2012

Inhaltsangabe

Latches and flip-flops used in low power sequential circuits are discussed in this book. A synthesis technique for power optimization in combinational logic circuits has been described. A flip flop has been proposed to reduce power consumption in CMOS circuits. A latch has been proposed which is evaluated from the standard ultra voltage latch for low power application. Simulation results show that the proposed latch has the lowest power consumption with no speed penalty. The significant power and area savings can be achieved by using proposed design.

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Über die Autorin bzw. den Autor

Neelam Swami, presently in Govt. College of Engg. & Tech. as Assistant Prof. in Dept of ECE has obtained B.E.(ECE) with Hons. from Rajathan Univ., Jaipur in 2008 & M.Tech.(VLSI Design) from MITS(Deemed Univ.) in 2011. Her area of research and interest is low power consumption in digital sequential circuits.

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Verlag
LAP LAMBERT Academic Publishing
Erscheinungsdatum
2012
Sprache
Englisch
ISBN 10 
3659177962
ISBN 13 
9783659177965
Einband
Taschenbuch
Anzahl der Seiten
92
Kontakt zum Hersteller
Nicht verfügbar
Verantwortliche Person
SIA OmniScriptum Publishing
customerservice@vdm-vsg.de

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