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High Performance Comparator Design using Hybrid PTL/CMOS Logic Style - Softcover

Sharma, Geetanjali; Nirmal, Uma

 
9783659420931: High Performance Comparator Design using Hybrid PTL/CMOS Logic Style
Softcover
ISBN 10: 365942093X ISBN 13: 9783659420931
Verlag: LAP LAMBERT Academic Publishing, 2013

Inhaltsangabe

The main objective of this book is to provide new low power, low area and low power delay product solution for Very Large Scale Integration (VLSI) designers. At circuit level, Hybrid PTL/CMOS logic style gives best results over CMOS only and PTL only. A fine cost-performance ratio comparator design based on modified 1's complement principle and conditional sum adder scheme using Hybrid PTL/CMOS logic style has been proposed in this report and the proposed design has small power dissipation, low power delay product and less area over various parameter ranges. Simulations are based on BSIM 3V3 90nm CMOS technology. It shows an 8-bit comparator of the proposed architecture only needs 154 transistors.

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Über die Autorin bzw. den Autor

Geetanjali Sharma ha 12 anni di esperienza di insegnamento e ricerca nel campo dell'elettronica e delle comunicazioni e della progettazione VLSI. Ha all'attivo diverse pubblicazioni in riviste e conferenze internazionali nel campo della progettazione VLSI.

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Verlag
LAP LAMBERT Academic Publishing
Erscheinungsdatum
2013
Sprache
Englisch
ISBN 10 
365942093X
ISBN 13 
9783659420931
Einband
Taschenbuch
Anzahl der Seiten
84
Kontakt zum Hersteller
Nicht verfügbar
Verantwortliche Person
SIA OmniScriptum Publishing
customerservice@vdm-vsg.de

Brivibas gatve 197
Riga
1039
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