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Energy Efficient VLSI Design and Implementation on 28nm FPGA: FPGA Based Energy Efficient Register, Memory and ALU Design - Softcover

Pandey, Bishwajeet; Pattanaik, Manisha

 
9783659477591: Energy Efficient VLSI Design and Implementation on 28nm FPGA: FPGA Based Energy Efficient Register, Memory and ALU Design
Softcover
ISBN 10: 3659477591 ISBN 13: 9783659477591
Verlag: LAP LAMBERT Academic Publishing, 2013

Inhaltsangabe

In the era of High Performance Energy Efficient Computing (HPEEC), the focus of research is again shifting for Eco-friendly design. Eco-Friendly design is a environment friendly design which has achieved energy efficiency in signicant amount. In this work, we applied 3 clock gating techniques (Latch Free, Latch Based, Flip-Flop Based) on 3 ALU(Synchronous, Asynchronous and Global Reset) to find the most energy efficient techniques out of 6 combination under consideration. Then, we try to get the benefit of 28nm technology in term of energy efficiency, which delivers twice the gate density of the 40nm process and also features a BRAM cell size shrink of 50 percent. Finally, we search for the most energy efficient IO Standard for latch free clock gated global reset ALU to design the most energy efficient ALU possible.

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Über die Autorin bzw. den Autor

Mr. Bishwajeet Pandey is Pursuing PhD from South Asian University(SAU), New Delhi. He has received the M.Tech(VLSI) from IIITM, Gwalior. He is receiving Fellowship from UGC and has received fellowship from MHRD. Dr. Manisha Pattanaik is an Associate Professor in Indian Institute of Information Technology and Management(IIITM), Gwalior since 2007.

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Verlag
LAP LAMBERT Academic Publishing
Erscheinungsdatum
2013
Sprache
Englisch
ISBN 10 
3659477591
ISBN 13 
9783659477591
Einband
Taschenbuch
Anzahl der Seiten
172
Kontakt zum Hersteller
Nicht verfügbar
Verantwortliche Person
Fastbook Publishing
customerservice@vdm-vsg.de

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