In spite of the huge research efforts and respectable scientific achievements, there are still challenges regarding the use of commercial ASIC technologies in space and safety-critical applications. The most important challenges are: 1. Radiation-hardened technologies are expensive (qualification and quality requirements are severe) and commercially not attractive (small volume production). 2. There is no standard integrated framework of circuit design techniques that provides simultaneous SEU, SET, and SEL fault-tolerance. 3. There is no standard design automation flow for fault-tolerant digital ASICs and SOCs. This book presents a design methodology for fault-tolerant ASIC that is based on redundant circuits with latchup protection and additional implementation steps during logic synthesis and layout generation. The proposed design approach provides the ASICs immune to the upsets, transients, and latchup faults by combining and integrating different fault-tolerant techniques in a carefully designed procedure.
Die Inhaltsangabe kann sich auf eine andere Ausgabe dieses Titels beziehen.
Vladimir Petrovic, Dr.-Ing. Microelectronics, Brandenburg University of Technology, Cottbus, Germany (2013). Research areas are aerospace microelectronics, radiation effects on microelectronics, development of techniques for radiation effects mitigation on system and circuit level. Currently he is scientist at IHP GmbH, Frankfurt (Oder), Germany
„Über diesen Titel“ kann sich auf eine andere Ausgabe dieses Titels beziehen.
Anbieter: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Deutschland
Taschenbuch. Zustand: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -In spite of the huge research efforts and respectable scientific achievements, there are still challenges regarding the use of commercial ASIC technologies in space and safety-critical applications. The most important challenges are: 1. Radiation-hardened technologies are expensive (qualification and quality requirements are severe) and commercially not attractive (small volume production). 2. There is no standard integrated framework of circuit design techniques that provides simultaneous SEU, SET, and SEL fault-tolerance. 3. There is no standard design automation flow for fault-tolerant digital ASICs and SOCs. This book presents a design methodology for fault-tolerant ASIC that is based on redundant circuits with latchup protection and additional implementation steps during logic synthesis and layout generation. The proposed design approach provides the ASICs immune to the upsets, transients, and latchup faults by combining and integrating different fault-tolerant techniques in a carefully designed procedure. 252 pp. Englisch. Bestandsnummer des Verkäufers 9783659534157
Anzahl: 2 verfügbar
Anbieter: moluna, Greven, Deutschland
Zustand: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Petrovic VladimirVladimir Petrovic, Dr.-Ing. Microelectronics, Brandenburg University of Technology, Cottbus, Germany (2013). Research areas are aerospace microelectronics, radiation effects on microelectronics, development of techni. Bestandsnummer des Verkäufers 5163013
Anzahl: Mehr als 20 verfügbar
Anbieter: preigu, Osnabrück, Deutschland
Taschenbuch. Zustand: Neu. Design Methodology for highly Reliable Digital ASIC Designs | Applied to Network-Centric System Middleware Switch Processor | Vladimir Petrovic | Taschenbuch | 252 S. | Englisch | 2014 | LAP LAMBERT Academic Publishing | EAN 9783659534157 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu. Bestandsnummer des Verkäufers 105007371
Anzahl: 5 verfügbar
Anbieter: buchversandmimpf2000, Emtmannsberg, BAYE, Deutschland
Taschenbuch. Zustand: Neu. This item is printed on demand - Print on Demand Titel. Neuware -In spite of the huge research efforts and respectable scientific achievements, there are still challenges regarding the use of commercial ASIC technologies in space and safety-critical applications. The most important challenges are: 1. Radiation-hardened technologies are expensive (qualification and quality requirements are severe) and commercially not attractive (small volume production). 2. There is no standard integrated framework of circuit design techniques that provides simultaneous SEU, SET, and SEL fault-tolerance. 3. There is no standard design automation flow for fault-tolerant digital ASICs and SOCs. This book presents a design methodology for fault-tolerant ASIC that is based on redundant circuits with latchup protection and additional implementation steps during logic synthesis and layout generation. The proposed design approach provides the ASICs immune to the upsets, transients, and latchup faults by combining and integrating different fault-tolerant techniques in a carefully designed procedure.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 252 pp. Englisch. Bestandsnummer des Verkäufers 9783659534157
Anzahl: 1 verfügbar
Anbieter: AHA-BUCH GmbH, Einbeck, Deutschland
Taschenbuch. Zustand: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - In spite of the huge research efforts and respectable scientific achievements, there are still challenges regarding the use of commercial ASIC technologies in space and safety-critical applications. The most important challenges are: 1. Radiation-hardened technologies are expensive (qualification and quality requirements are severe) and commercially not attractive (small volume production). 2. There is no standard integrated framework of circuit design techniques that provides simultaneous SEU, SET, and SEL fault-tolerance. 3. There is no standard design automation flow for fault-tolerant digital ASICs and SOCs. This book presents a design methodology for fault-tolerant ASIC that is based on redundant circuits with latchup protection and additional implementation steps during logic synthesis and layout generation. The proposed design approach provides the ASICs immune to the upsets, transients, and latchup faults by combining and integrating different fault-tolerant techniques in a carefully designed procedure. Bestandsnummer des Verkäufers 9783659534157
Anzahl: 1 verfügbar
Anbieter: Mispah books, Redhill, SURRE, Vereinigtes Königreich
paperback. Zustand: New. NEW. SHIPS FROM MULTIPLE LOCATIONS. book. Bestandsnummer des Verkäufers ERICA82936595341536
Anzahl: 1 verfügbar