Performance Evaluation of 3D SRAM Architecture using Coaxial TSV: Research Perspective - Softcover

Prasath, R. Arun; Divya, S. L.

Softcover

ISBN 10: 3659746495 ISBN 13: 9783659746499

Verlag: LAP LAMBERT Academic Publishing, 2015

Inhaltsangabe

3D stacking of logic and memory devices is essential to keep the Moore's law ticking. In 3D integration, memory devices can be stacked on the top of processors. TSV based 3D memory architecture enables the reuse of logic dies with multiple memory layers. Conventional 3D memory suffer from speed, power and yield overhead due to large parasitic load of TSV and cross layer PVT variations. In order to overcome these limitations, this paper the physical design of a semi master-slave (SMS) architecture of 3D SRAM which provides a constant-load logic-SRAM interface across various stacked layers and high tolerance for variations in cross-layer PVT is introduced. The SMS scheme is combined with self-timed differential-TSV (STDT) employing a TSV-load tracking scheme to achieve small TSV voltage swing for suppressing power and speed overheads of cross-layer TSV signal communication resulting from large TSV parasitic loads in UMCP designs with scalable stacked layers and wide IO. This provides a universal memory capacity platform.

Über diesen Titel

Über die Autorin bzw. den Autor

R. Arun Prasath, Faculty in the Department of Electronics and Communication Engineering at Anna University Regional Office, Madurai. Currently pursuing his Ph.D under faculty of Information and Communication Engineering. His research interests include Low Power VLSI Design, Analog VLSI and Wireless sensor Networks.

Details zur Ausgabe

• Verlag: LAP LAMBERT Academic Publishing
• Erscheinungsdatum: 2015
• Sprache: Englisch
• ISBN 10: 3659746495
• ISBN 13: 9783659746499
• Einband: Taschenbuch
• Anzahl der Seiten: 68
• Kontakt zum Hersteller: Nicht verfügbar
• Verantwortliche Person: Nicht verfügbar