In this work The novel single ended 5T and 6T SRAM cell is presented. This transistor is high density cell or takes less area than conventional 6T SRAM cell. Leakage current of this cell is very low as compared to other 5T or conventional 6T cell. There is a requirement of precharge circuit for this cell as that in conventional 6T SRAM cell. This cell is also power efficient. Also results show that the data stored in this cell is highly stable.There is always scope of improvement in any type of circuit or application. With the proposed configuration we can improve it with various techniques. We can change aspect ratio of the cell for better results. We can apply clock gating for power efficient circuit. We can improve peripheral circuit for better performance.
Die Inhaltsangabe kann sich auf eine andere Ausgabe dieses Titels beziehen.
Rohin Gupta is research scholar at GNDEC,Ludhiana and chairman of Brainiac Solutions firm (www.brainiacsolutions.in). Professor Sandeep Singh Gill is working as Professor and Head in ECE Department at GNDEC, Ludhiana.Navneet Kaur is working as Assistant Professor at GNDEC, Ludhiana.
„Über diesen Titel“ kann sich auf eine andere Ausgabe dieses Titels beziehen.
Anbieter: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Deutschland
Taschenbuch. Zustand: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -In this work The novel single ended 5T and 6T SRAM cell is presented. This transistor is high density cell or takes less area than conventional 6T SRAM cell. Leakage current of this cell is very low as compared to other 5T or conventional 6T cell. There is a requirement of precharge circuit for this cell as that in conventional 6T SRAM cell. This cell is also power efficient. Also results show that the data stored in this cell is highly stable.There is always scope of improvement in any type of circuit or application. With the proposed configuration we can improve it with various techniques. We can change aspect ratio of the cell for better results. We can apply clock gating for power efficient circuit. We can improve peripheral circuit for better performance. 108 pp. Englisch. Bestandsnummer des Verkäufers 9783659861116
Anzahl: 2 verfügbar
Anbieter: Books Puddle, New York, NY, USA
Zustand: New. Bestandsnummer des Verkäufers 26405915516
Anzahl: 4 verfügbar
Anbieter: Majestic Books, Hounslow, Vereinigtes Königreich
Zustand: New. Print on Demand. Bestandsnummer des Verkäufers 407271587
Anzahl: 4 verfügbar
Anbieter: moluna, Greven, Deutschland
Zustand: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Gupta RohinRohin Gupta is research scholar at GNDEC,Ludhiana and chairman of Brainiac Solutions firm (www.brainiacsolutions.in). Professor Sandeep Singh Gill is working as Professor and Head in ECE Department at GNDEC, Ludhiana.Navne. Bestandsnummer des Verkäufers 158877267
Anzahl: Mehr als 20 verfügbar
Anbieter: Biblios, Frankfurt am main, HESSE, Deutschland
Zustand: New. PRINT ON DEMAND. Bestandsnummer des Verkäufers 18405915510
Anzahl: 4 verfügbar
Anbieter: Revaluation Books, Exeter, Vereinigtes Königreich
Paperback. Zustand: Brand New. 108 pages. 8.66x5.91x0.25 inches. In Stock. Bestandsnummer des Verkäufers 3659861111
Anzahl: 1 verfügbar
Anbieter: buchversandmimpf2000, Emtmannsberg, BAYE, Deutschland
Taschenbuch. Zustand: Neu. This item is printed on demand - Print on Demand Titel. Neuware -In this work The novel single ended 5T and 6T SRAM cell is presented. This transistor is high density cell or takes less area than conventional 6T SRAM cell. Leakage current of this cell is very low as compared to other 5T or conventional 6T cell. There is a requirement of precharge circuit for this cell as that in conventional 6T SRAM cell. This cell is also power efficient. Also results show that the data stored in this cell is highly stable.There is always scope of improvement in any type of circuit or application. With the proposed configuration we can improve it with various techniques. We can change aspect ratio of the cell for better results. We can apply clock gating for power efficient circuit. We can improve peripheral circuit for better performance.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 108 pp. Englisch. Bestandsnummer des Verkäufers 9783659861116
Anzahl: 1 verfügbar
Anbieter: AHA-BUCH GmbH, Einbeck, Deutschland
Taschenbuch. Zustand: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - In this work The novel single ended 5T and 6T SRAM cell is presented. This transistor is high density cell or takes less area than conventional 6T SRAM cell. Leakage current of this cell is very low as compared to other 5T or conventional 6T cell. There is a requirement of precharge circuit for this cell as that in conventional 6T SRAM cell. This cell is also power efficient. Also results show that the data stored in this cell is highly stable.There is always scope of improvement in any type of circuit or application. With the proposed configuration we can improve it with various techniques. We can change aspect ratio of the cell for better results. We can apply clock gating for power efficient circuit. We can improve peripheral circuit for better performance. Bestandsnummer des Verkäufers 9783659861116
Anzahl: 1 verfügbar
Anbieter: preigu, Osnabrück, Deutschland
Taschenbuch. Zustand: Neu. CMOS SRAM Design and analysis of low leakage and high speed SRAM cell | Rohin Gupta (u. a.) | Taschenbuch | 108 S. | Englisch | 2016 | LAP LAMBERT Academic Publishing | EAN 9783659861116 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu. Bestandsnummer des Verkäufers 103822325
Anzahl: 5 verfügbar
Anbieter: Mispah books, Redhill, SURRE, Vereinigtes Königreich
paperback. Zustand: New. NEW. SHIPS FROM MULTIPLE LOCATIONS. book. Bestandsnummer des Verkäufers ERICA82936598611116
Anzahl: 1 verfügbar