Inhaltsangabe
Reversible or information-lossless circuits have applications in digital signal processing, communication, computer graphics and cryptography. They are also a fundamental requirement in the emerging field of quantum computation. We investigate the synthesis of reversible circuits that employ a minimum number of gates and contain no redundant input-output line pairs. In this thesis, we have proposed a structure which constructs Reversible Programmable Array Logic (RPAL).An algorithm has been proposed to reduce total number of gates, garbage outputs in the AND plane of a RPAL. We compare the existing AND plane with the proposed one using benchmark functions. We make the RPLA as fault tolerant. Our proposed design can realize ESOP (Exclusive Sum-of-Products) operations in terms of multi-output functions by using minimum number of gates, garbage outputs and quantum cost. In our design, we have used fault tolerant FRG (Fredkin Gate) and F2G (Feynman Double Gate) for making our RPAL Fault Tolerant. We have also proposed a non fault tolerant design for RPAL with the minimum number of gates, garbage outputs and quantum cost.
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Über die Autorin bzw. den Autor
Md. Solaiman Mia received the B.Sc.(Hons.) and M.S. in the Dept. of Computer Science & Engineering from University of Dhaka, Bangladesh. He is currently working as a Lecturer with the Dept. of Computer Science & Engineering, Hamdard University Bangladesh. His research interests include Reversible Logic Synthesis, Quantum Computing etc.
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Design a Reversible Fault Tolerant Programmable Array Logic
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LAP LAMBERT Academic Publishing Apr 2016, 2016
ISBN 10: 365987552X
ISBN 13: 9783659875526
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Taschenbuch. Zustand: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Reversible or information-lossless circuits have applications in digital signal processing, communication, computer graphics and cryptography. They are also a fundamental requirement in the emerging field of quantum computation. We investigate the synthesis of reversible circuits that employ a minimum number of gates and contain no redundant input-output line pairs. In this thesis, we have proposed a structure which constructs Reversible Programmable Array Logic (RPAL).An algorithm has been proposed to reduce total number of gates, garbage outputs in the AND plane of a RPAL. We compare the existing AND plane with the proposed one using benchmark functions. We make the RPLA as fault tolerant. Our proposed design can realize ESOP (Exclusive Sum-of-Products) operations in terms of multi-output functions by using minimum number of gates, garbage outputs and quantum cost. In our design, we have used fault tolerant FRG (Fredkin Gate) and F2G (Feynman Double Gate) for making our RPAL Fault Tolerant. We have also proposed a non fault tolerant design for RPAL with the minimum number of gates, garbage outputs and quantum cost. 56 pp. Englisch. Bestandsnummer des Verkäufers 9783659875526
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Design a Reversible Fault Tolerant Programmable Array Logic: An Efficient Approach
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Design a Reversible Fault Tolerant Programmable Array Logic
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Zustand: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Mia SolaimanMd. Solaiman Mia received the B.Sc.(Hons.) and M.S. in the Dept. of Computer Science & Engineering from University of Dhaka, Bangladesh. He is currently working as a Lecturer with the Dept. of Computer Science & Engineeri. Bestandsnummer des Verkäufers 158963275
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Design a Reversible Fault Tolerant Programmable Array Logic
Verlag:
LAP LAMBERT Academic Publishing Apr 2016, 2016
ISBN 10: 365987552X
ISBN 13: 9783659875526
Neu
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Taschenbuch. Zustand: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Reversible or information-lossless circuits have applications in digital signal processing, communication, computer graphics and cryptography. They are also a fundamental requirement in the emerging field of quantum computation. We investigate the synthesis of reversible circuits that employ a minimum number of gates and contain no redundant input-output line pairs. In this thesis, we have proposed a structure which constructs Reversible Programmable Array Logic (RPAL).An algorithm has been proposed to reduce total number of gates, garbage outputs in the AND plane of a RPAL. We compare the existing AND plane with the proposed one using benchmark functions. We make the RPLA as fault tolerant. Our proposed design can realize ESOP (Exclusive Sum-of-Products) operations in terms of multi-output functions by using minimum number of gates, garbage outputs and quantum cost. In our design, we have used fault tolerant FRG (Fredkin Gate) and F2G (Feynman Double Gate) for making our RPAL Fault Tolerant. We have also proposed a non fault tolerant design for RPAL with the minimum number of gates, garbage outputs and quantum cost.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 56 pp. Englisch. Bestandsnummer des Verkäufers 9783659875526
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Design a Reversible Fault Tolerant Programmable Array Logic : An Efficient Approach
Verlag:
LAP LAMBERT Academic Publishing, 2016
ISBN 10: 365987552X
ISBN 13: 9783659875526
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Taschenbuch. Zustand: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Reversible or information-lossless circuits have applications in digital signal processing, communication, computer graphics and cryptography. They are also a fundamental requirement in the emerging field of quantum computation. We investigate the synthesis of reversible circuits that employ a minimum number of gates and contain no redundant input-output line pairs. In this thesis, we have proposed a structure which constructs Reversible Programmable Array Logic (RPAL).An algorithm has been proposed to reduce total number of gates, garbage outputs in the AND plane of a RPAL. We compare the existing AND plane with the proposed one using benchmark functions. We make the RPLA as fault tolerant. Our proposed design can realize ESOP (Exclusive Sum-of-Products) operations in terms of multi-output functions by using minimum number of gates, garbage outputs and quantum cost. In our design, we have used fault tolerant FRG (Fredkin Gate) and F2G (Feynman Double Gate) for making our RPAL Fault Tolerant. We have also proposed a non fault tolerant design for RPAL with the minimum number of gates, garbage outputs and quantum cost. Bestandsnummer des Verkäufers 9783659875526
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Design a Reversible Fault Tolerant Programmable Array Logic | An Efficient Approach
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Taschenbuch. Zustand: Neu. Design a Reversible Fault Tolerant Programmable Array Logic | An Efficient Approach | Solaiman Mia | Taschenbuch | 56 S. | Englisch | 2016 | LAP LAMBERT Academic Publishing | EAN 9783659875526 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu. Bestandsnummer des Verkäufers 103800139
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