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Nowadays hi-tech secure products need more services and more security. Furthermore the corresponding market is now oriented towards more flexibility. In this thesis we propose as novel solution a Multi-algorithm Cryptographic Co-processor called Celator. Celator is able to encrypt or decrypt data blocks using private key encryption algorithms such as Advanced Encryption Standard (AES) or Data Encryption Standard (DES). Moreover Celator allows condensing data using the Secure Hash Algorithms (SHA). These algorithms are frequently implemented in hi-tech secure products in software or in hardware mode. Celator belongs to the class of the flexible hardware implementations, and allows an user implementing its own cryptographic algorithm under specific conditions. Celator architecture is based on a 4x4 Processing Elements (PE) systolic array, a Controller with a Finite State Machine (FSM) and a local memory. Data are encrypted or decrypted by the PE array. This thesis presents Celator architecture, as well as its AES, DES, and SHA basic operations. Celator performances are then given and compared to other securitycircuits.
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Über die Autorin bzw. den Autor
Daniele Fronte, PhD: studied Computer Science at the University of Provence. Hardware Engineer at Atmel, Rousset, France.
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Celator
Verlag:
LAP LAMBERT Academic Publishing Dez 2009, 2009
ISBN 10: 3838334884
ISBN 13: 9783838334882
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Taschenbuch. Zustand: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Nowadays hi-tech secure products need more services and more security. Furthermore the corresponding market is now oriented towards more flexibility. In this thesis we propose as novel solution a Multi-algorithm Cryptographic Co-processor called Celator. Celator is able to encrypt or decrypt data blocks using private key encryption algorithms such as Advanced Encryption Standard (AES) or Data Encryption Standard (DES). Moreover Celator allows condensing data using the Secure Hash Algorithms (SHA). These algorithms are frequently implemented in hi-tech secure products in software or in hardware mode. Celator belongs to the class of the flexible hardware implementations, and allows an user implementing its own cryptographic algorithm under specific conditions. Celator architecture is based on a 4x4 Processing Elements (PE) systolic array, a Controller with a Finite State Machine (FSM) and a local memory. Data are encrypted or decrypted by the PE array. This thesis presents Celator architecture, as well as its AES, DES, and SHA basic operations. Celator performances are then given and compared to other securitycircuits. 108 pp. Englisch. Bestandsnummer des Verkäufers 9783838334882
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Celator
Verlag:
LAP Lambert Academic Publishing, 2009
ISBN 10: 3838334884
ISBN 13: 9783838334882
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Zustand: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Nowadays hi-tech secure products need more services and more security. Furthermore the corresponding market is now oriented towards more flexibility. In this thesis we propose as novel solution a Multi-algorithm Cryptographic Co-processor called Celator. Ce. Bestandsnummer des Verkäufers 5414065
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Celator
Verlag:
LAP LAMBERT Academic Publishing Dez 2009, 2009
ISBN 10: 3838334884
ISBN 13: 9783838334882
Neu
Taschenbuch
Anbieter: buchversandmimpf2000, Emtmannsberg, BAYE, Deutschland
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Taschenbuch. Zustand: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Nowadays hi-tech secure products need more services and more security. Furthermore the corresponding market is now oriented towards more flexibility. In this thesis we propose as novel solution a Multi-algorithm Cryptographic Co-processor called Celator. Celator is able to encrypt or decrypt data blocks using private key encryption algorithms such as Advanced Encryption Standard (AES) or Data Encryption Standard (DES). Moreover Celator allows condensing data using the Secure Hash Algorithms (SHA). These algorithms are frequently implemented in hi-tech secure products in software or in hardware mode. Celator belongs to the class of the flexible hardware implementations, and allows an user implementing its own cryptographic algorithm under specific conditions. Celator architecture is based on a 4x4 Processing Elements (PE) systolic array, a Controller with a Finite State Machine (FSM) and a local memory. Data are encrypted or decrypted by the PE array. This thesis presents Celator architecture, as well as its AES, DES, and SHA basic operations. Celator performances are then given and compared to other securitycircuits.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 108 pp. Englisch. Bestandsnummer des Verkäufers 9783838334882
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Celator : Design and development of a reconfigurable cryptographic co-processor
Verlag:
LAP LAMBERT Academic Publishing, 2010
ISBN 10: 3838334884
ISBN 13: 9783838334882
Neu
Taschenbuch
Anbieter: AHA-BUCH GmbH, Einbeck, Deutschland
Verkäuferbewertung 5 von 5 Sternen
Taschenbuch. Zustand: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Nowadays hi-tech secure products need more services and more security. Furthermore the corresponding market is now oriented towards more flexibility. In this thesis we propose as novel solution a Multi-algorithm Cryptographic Co-processor called Celator. Celator is able to encrypt or decrypt data blocks using private key encryption algorithms such as Advanced Encryption Standard (AES) or Data Encryption Standard (DES). Moreover Celator allows condensing data using the Secure Hash Algorithms (SHA). These algorithms are frequently implemented in hi-tech secure products in software or in hardware mode. Celator belongs to the class of the flexible hardware implementations, and allows an user implementing its own cryptographic algorithm under specific conditions. Celator architecture is based on a 4x4 Processing Elements (PE) systolic array, a Controller with a Finite State Machine (FSM) and a local memory. Data are encrypted or decrypted by the PE array. This thesis presents Celator architecture, as well as its AES, DES, and SHA basic operations. Celator performances are then given and compared to other securitycircuits. Bestandsnummer des Verkäufers 9783838334882
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Celator: Design and development of a reconfigurable cryptographic co-processor
Verlag:
LAP Lambert Academic Publishing, 2010
ISBN 10: 3838334884
ISBN 13: 9783838334882
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