Hardware/Software (Hw/Sw) systems are likely to become essential in all aspects of everyday life. However, the productive design of these systems is limited by several factors, some of them being the increasing complexity of applications, the heterogeneous nature of products and services as well as the shrinking of the time-to-market delay. Transaction Level Modeling (TLM) paradigm is considered as one of the most promising simulation paradigms to break down the design complexity by allowing the exploration and validation of design alternatives at high levels of abstraction. This research proposes a timing expression methodology in Transation Level Models based on temporal constraints analysis. We propose to use a combination of two paradigms to accelerate the design process: TLM on one hand and a methodology to express timing between different transactions on the other hand. As there are many definitions of TLM with several pro and contra, in the context of our research we define a hardware/software (Hw/Sw) specification and simulation methodology which supports TLM in such a way that several modeling concepts can be seen separately.
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Alena Tsikhanovich obtained a Ph.D. in computer science from the University of Montreal in 2010.Her current research interests are related to the domains of hardware/software system modeling, simulation and verification.
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Taschenbuch. Zustand: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Hardware/Software (Hw/Sw) systems are likely to become essential in all aspects of everyday life. However, the productive design of these systems is limited by several factors, some of them being the increasing complexity of applications, the heterogeneous nature of products and services as well as the shrinking of the time-to-market delay. Transaction Level Modeling (TLM) paradigm is considered as one of the most promising simulation paradigms to break down the design complexity by allowing the exploration and validation of design alternatives at high levels of abstraction. This research proposes a timing expression methodology in Transation Level Models based on temporal constraints analysis. We propose to use a combination of two paradigms to accelerate the design process: TLM on one hand and a methodology to express timing between different transactions on the other hand. As there are many definitions of TLM with several pro and contra, in the context of our research we define a hardware/software (Hw/Sw) specification and simulation methodology which supports TLM in such a way that several modeling concepts can be seen separately. 136 pp. Englisch. Bestandsnummer des Verkäufers 9783843386944
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Taschenbuch. Zustand: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Hardware/Software (Hw/Sw) systems are likely to become essential in all aspects of everyday life. However, the productive design of these systems is limited by several factors, some of them being the increasing complexity of applications, the heterogeneous nature of products and services as well as the shrinking of the time-to-market delay. Transaction Level Modeling (TLM) paradigm is considered as one of the most promising simulation paradigms to break down the design complexity by allowing the exploration and validation of design alternatives at high levels of abstraction. This research proposes a timing expression methodology in Transation Level Models based on temporal constraints analysis. We propose to use a combination of two paradigms to accelerate the design process: TLM on one hand and a methodology to express timing between different transactions on the other hand. As there are many definitions of TLM with several pro and contra, in the context of our research we define a hardware/software (Hw/Sw) specification and simulation methodology which supports TLM in such a way that several modeling concepts can be seen separately. Bestandsnummer des Verkäufers 9783843386944
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Zustand: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Tsikhanovich AlenaAlena Tsikhanovich obtained a Ph.D. in computer science from the University of Montreal in 2010.Her current research interests are related to the domains of hardware/software system modeling, simulation and verif. Bestandsnummer des Verkäufers 5468533
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Taschenbuch. Zustand: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Hardware/Software (Hw/Sw) systems are likely to become essential in all aspects of everyday life. However, the productive design of these systems is limited by several factors, some of them being the increasing complexity of applications, the heterogeneous nature of products and services as well as the shrinking of the time-to-market delay. Transaction Level Modeling (TLM) paradigm is considered as one of the most promising simulation paradigms to break down the design complexity by allowing the exploration and validation of design alternatives at high levels of abstraction. This research proposes a timing expression methodology in Transation Level Models based on temporal constraints analysis. We propose to use a combination of two paradigms to accelerate the design process: TLM on one hand and a methodology to express timing between different transactions on the other hand. As there are many definitions of TLM with several pro and contra, in the context of our research we define a hardware/software (Hw/Sw) specification and simulation methodology which supports TLM in such a way that several modeling concepts can be seen separately.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 136 pp. Englisch. Bestandsnummer des Verkäufers 9783843386944
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Taschenbuch. Zustand: Neu. Timing Verification in Transaction Modeling | Timing Verification in Transaction Modeling | Alena Tsikhanovich | Taschenbuch | 136 S. | Englisch | 2011 | LAP LAMBERT Academic Publishing | EAN 9783843386944 | Verantwortliche Person für die EU: BoD - Books on Demand, In de Tarpen 42, 22848 Norderstedt, info[at]bod[dot]de | Anbieter: preigu. Bestandsnummer des Verkäufers 107100899
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