VLSI-Analog & Digital Design: Verilog Code for Digital & Analog Design - Softcover

Sudhan, Manu; Sudhan S, Sowmya

 
9783846543351: VLSI-Analog & Digital Design: Verilog Code for Digital & Analog Design
Softcover
ISBN 10: 3846543357 ISBN 13: 9783846543351
Verlag: LAP LAMBERT Academic Publishing, 2011

Inhaltsangabe

This book gives the complete information on VHDL & Verilog coding logic for a few analog and digital circuits with their test bench for verification. Hardware Description Language (HDL) is a Computer Aided Design (CAD) tool for the modern design synthesis of digital systems. The recent steady advances in semiconductor technology continue to increase the power and complexity of digital systems. Due to their complexity, such systems cannot be realized using discrete Integrated Circuits (ICs). They are usually realized using high-density programmable chips, such as Application Specified Integrated Circuits (ASICs) and Field Programmable Gate Arrays (FPGAs) and require sophisticated CAD tools. HDL is an integral part of such tools. HDL offers the author a very efficient tool for implementing and synthesizing design on chips. The author uses HDL to describe the system in a computer language that is similar to several commonly used software languages such as C Debugging. The design is easy, since HDL packages implement simulators and test benches. The two widely used Hardware Description Languages are Very-high-speed integrated circuits Hardware Description Language (VHDL) and Verilog.

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Reseña del editor

This book gives the complete information on VHDL & Verilog coding logic for a few analog and digital circuits with their test bench for verification. Hardware Description Language (HDL) is a Computer Aided Design (CAD) tool for the modern design synthesis of digital systems. The recent steady advances in semiconductor technology continue to increase the power and complexity of digital systems. Due to their complexity, such systems cannot be realized using discrete Integrated Circuits (ICs). They are usually realized using high-density programmable chips, such as Application Specified Integrated Circuits (ASICs) and Field Programmable Gate Arrays (FPGAs) and require sophisticated CAD tools. HDL is an integral part of such tools. HDL offers the author a very efficient tool for implementing and synthesizing design on chips. The author uses HDL to describe the system in a computer language that is similar to several commonly used software languages such as C Debugging. The design is easy, since HDL packages implement simulators and test benches. The two widely used Hardware Description Languages are Very-high-speed integrated circuits Hardware Description Language (VHDL) and Verilog.

Biografía del autor

B S Manusudhan/ECE/Academy for Technical & Management Excellence,best academic achievement awardee.Core inventor of “CELL BASED INTELLIGENT COUNTERFEIT TELLER” & "A FLASH PACKAGE FOR COORDINATING VTU PRACTICAL EXAMINATION".Published many research papers in international and national level.Working on VLSI for designing "ATME-P2011" processor.

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Verlag
LAP LAMBERT Academic Publishing
Erscheinungsdatum
2011
Sprache
Englisch
ISBN 10 
3846543357
ISBN 13 
9783846543351
Einband
Tapa blanda
Anzahl der Seiten
104
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Verantwortliche Person
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