Approximate computing can decrease the design complexity with an increase in performance and power proficiency for error resilient applications. This brief deals with a new design approach for approximation of multipliers. The partial products of the multiplier are altered to introduce varying probability terms. Logic complexity of approximation is varied for the accumulation of altered partial products based on their probability. The proposed approximation is utilized in two variants of 16-bit multipliers. Synthesis results reveal that the proposed 8 bit multiplier achieve power savings and reduces the delay compared to an exact multiplier. They have better accuracy when contrasted with existing estimated multipliers. Which are better than the previous works. Performance of the proposed multipliers is evaluated with an image processing application using Gaussian filter, where Gaussian filter with proposed approximate multiplier model achieves the highest peak signal to noise ratio(PSNR).
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Prof. Sridhar T.N., Assistant Professor, Department of Electronics and Communication Engineering, Cambridge Institute of Technology, Devanahalli, Bangalore Rural district has taught many subjects to engineering students. He has been specialised in VLSI design and Embedded system.
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Taschenbuch. Zustand: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Approximate computing can decrease the design complexity with an increase in performance and power proficiency for error resilient applications. This brief deals with a new design approach for approximation of multipliers. The partial products of the multiplier are altered to introduce varying probability terms. Logic complexity of approximation is varied for the accumulation of altered partial products based on their probability. The proposed approximation is utilized in two variants of 16-bit multipliers. Synthesis results reveal that the proposed 8 bit multiplier achieve power savings and reduces the delay compared to an exact multiplier. They have better accuracy when contrasted with existing estimated multipliers. Which are better than the previous works. Performance of the proposed multipliers is evaluated with an image processing application using Gaussian filter, where Gaussian filter with proposed approximate multiplier model achieves the highest peak signal to noise ratio(PSNR). 68 pp. Englisch. Bestandsnummer des Verkäufers 9786203307849
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Taschenbuch. Zustand: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Approximate computing can decrease the design complexity with an increase in performance and power proficiency for error resilient applications. This brief deals with a new design approach for approximation of multipliers. The partial products of the multiplier are altered to introduce varying probability terms. Logic complexity of approximation is varied for the accumulation of altered partial products based on their probability. The proposed approximation is utilized in two variants of 16-bit multipliers. Synthesis results reveal that the proposed 8 bit multiplier achieve power savings and reduces the delay compared to an exact multiplier. They have better accuracy when contrasted with existing estimated multipliers. Which are better than the previous works. Performance of the proposed multipliers is evaluated with an image processing application using Gaussian filter, where Gaussian filter with proposed approximate multiplier model achieves the highest peak signal to noise ratio(PSNR).VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 68 pp. Englisch. Bestandsnummer des Verkäufers 9786203307849
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Taschenbuch. Zustand: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Approximate computing can decrease the design complexity with an increase in performance and power proficiency for error resilient applications. This brief deals with a new design approach for approximation of multipliers. The partial products of the multiplier are altered to introduce varying probability terms. Logic complexity of approximation is varied for the accumulation of altered partial products based on their probability. The proposed approximation is utilized in two variants of 16-bit multipliers. Synthesis results reveal that the proposed 8 bit multiplier achieve power savings and reduces the delay compared to an exact multiplier. They have better accuracy when contrasted with existing estimated multipliers. Which are better than the previous works. Performance of the proposed multipliers is evaluated with an image processing application using Gaussian filter, where Gaussian filter with proposed approximate multiplier model achieves the highest peak signal to noise ratio(PSNR). Bestandsnummer des Verkäufers 9786203307849
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Taschenbuch. Zustand: Neu. Approximate multipliers for image processing | By design of area and power efficiency | Sridhar T. N. | Taschenbuch | Englisch | 2021 | LAP LAMBERT Academic Publishing | EAN 9786203307849 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu. Bestandsnummer des Verkäufers 119720099
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