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This book is about the designing of low power asynchronous Viterbi Decoder. Due to requirements of high speed, low power, low weight and long battery life a low power Viterbi decoders has a great demand in the communication field.In mobile communication system, the Viterbi decoder occupies greater chip area which directly related to the power loss. So we designed such a system which consumes less dynamic power and can be used in low power applications. Instead of using Global Clock the system is designed using Local clock by employing low power technique as 2 phase Level Encoded Dual Rail encoding with Minimum Transition Hybrid Register Exchange decoding method to reduce the switching activity and to avoid unnecessary memory operations so as to reduce dynamic power of decoder. The designed system has been tested with different input vectors and dynamic power is calculated for Synchronous and Asynchronous Viterbi decoder. The Comparative Power Analysis by different decoding methods proved that Asynchronous Viterbi decoder has less power consumption than Synchronous Viterbi Decoder.
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Über die Autorin bzw. den Autor
Dr.Surekha Tadse sta lavorando come assistente professore al G H Raisoni College of Engineering, Nagpur, (MH), India. La sua area di interesse è la comunicazione e VLSI. Ha pubblicato più di 30 articoli in riviste e conferenze rinomate.Dr.Sanjay Haridas sta lavorando come professore e decano accademico nel J D College of Engineering and Management, Nagpur.
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Low Power Asynchronous Viterbi Decoder
Verlag:
LAP LAMBERT Academic Publishing Mai 2021, 2021
ISBN 10: 6203860913
ISBN 13: 9786203860917
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Anbieter: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Deutschland
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Taschenbuch. Zustand: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book is about the designing of low power asynchronous Viterbi Decoder. Due to requirements of high speed, low power, low weight and long battery life a low power Viterbi decoders has a great demand in the communication field.In mobile communication system, the Viterbi decoder occupies greater chip area which directly related to the power loss. So we designed such a system which consumes less dynamic power and can be used in low power applications. Instead of using Global Clock the system is designed using Local clock by employing low power technique as 2 phase Level Encoded Dual Rail encoding with Minimum Transition Hybrid Register Exchange decoding method to reduce the switching activity and to avoid unnecessary memory operations so as to reduce dynamic power of decoder. The designed system has been tested with different input vectors and dynamic power is calculated for Synchronous and Asynchronous Viterbi decoder. The Comparative Power Analysis by different decoding methods proved that Asynchronous Viterbi decoder has less power consumption than Synchronous Viterbi Decoder. 96 pp. Englisch. Bestandsnummer des Verkäufers 9786203860917
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Low Power Asynchronous Viterbi Decoder
Verlag:
LAP LAMBERT Academic Publishing, 2021
ISBN 10: 6203860913
ISBN 13: 9786203860917
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Zustand: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Tadse SurekhaDr.Surekha Tadse is working as Assistant Professor in G H Raisoni College of Engineering, Nagpur, (MH), India. Her area of interest is Communication and VLSI. She published more than 30 papers in reputed Journals and Con. Bestandsnummer des Verkäufers 478262482
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Low Power Asynchronous Viterbi Decoder
Verlag:
LAP LAMBERT Academic Publishing Mai 2021, 2021
ISBN 10: 6203860913
ISBN 13: 9786203860917
Neu
Taschenbuch
Anbieter: buchversandmimpf2000, Emtmannsberg, BAYE, Deutschland
Verkäuferbewertung 5 von 5 Sternen
Taschenbuch. Zustand: Neu. This item is printed on demand - Print on Demand Titel. Neuware -This book is about the designing of low power asynchronous Viterbi Decoder. Due to requirements of high speed, low power, low weight and long battery life a low power Viterbi decoders has a great demand in the communication field.In mobile communication system, the Viterbi decoder occupies greater chip area which directly related to the power loss. So we designed such a system which consumes less dynamic power and can be used in low power applications. Instead of using Global Clock the system is designed using Local clock by employing low power technique as 2 phase Level Encoded Dual Rail encoding with Minimum Transition Hybrid Register Exchange decoding method to reduce the switching activity and to avoid unnecessary memory operations so as to reduce dynamic power of decoder. The designed system has been tested with different input vectors and dynamic power is calculated for Synchronous and Asynchronous Viterbi decoder. The Comparative Power Analysis by different decoding methods proved that Asynchronous Viterbi decoder has less power consumption than Synchronous Viterbi Decoder.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 96 pp. Englisch. Bestandsnummer des Verkäufers 9786203860917
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Low Power Asynchronous Viterbi Decoder : Asynchronous Mode
Verlag:
LAP LAMBERT Academic Publishing, 2021
ISBN 10: 6203860913
ISBN 13: 9786203860917
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Anbieter: AHA-BUCH GmbH, Einbeck, Deutschland
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Taschenbuch. Zustand: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - This book is about the designing of low power asynchronous Viterbi Decoder. Due to requirements of high speed, low power, low weight and long battery life a low power Viterbi decoders has a great demand in the communication field.In mobile communication system, the Viterbi decoder occupies greater chip area which directly related to the power loss. So we designed such a system which consumes less dynamic power and can be used in low power applications. Instead of using Global Clock the system is designed using Local clock by employing low power technique as 2 phase Level Encoded Dual Rail encoding with Minimum Transition Hybrid Register Exchange decoding method to reduce the switching activity and to avoid unnecessary memory operations so as to reduce dynamic power of decoder. The designed system has been tested with different input vectors and dynamic power is calculated for Synchronous and Asynchronous Viterbi decoder. The Comparative Power Analysis by different decoding methods proved that Asynchronous Viterbi decoder has less power consumption than Synchronous Viterbi Decoder. Bestandsnummer des Verkäufers 9786203860917
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Low Power Asynchronous Viterbi Decoder | Asynchronous Mode
Verlag:
LAP LAMBERT Academic Publishing, 2021
ISBN 10: 6203860913
ISBN 13: 9786203860917
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Taschenbuch. Zustand: Neu. Low Power Asynchronous Viterbi Decoder | Asynchronous Mode | Surekha Tadse (u. a.) | Taschenbuch | Englisch | 2021 | LAP LAMBERT Academic Publishing | EAN 9786203860917 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu. Bestandsnummer des Verkäufers 120201294
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