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FFT / IFFT Architectures Using Fused Floating-point Operations: Area and Power Efficient Variable Length Pipelined FFT/IFFT Architectures - Softcover

Madhu Babu, Mallepalli; Rama Naidu, Kurukundu

 
9786206156420: FFT / IFFT Architectures Using Fused Floating-point Operations: Area and Power Efficient Variable Length Pipelined FFT/IFFT Architectures
Softcover
ISBN 10: 6206156427 ISBN 13: 9786206156420
Verlag: LAP LAMBERT Academic Publishing, 2023

Inhaltsangabe

Fast Fourier Transform (FFT) architecture is one of the critical modules used in the fields of signal processing and communication systems for various applications. These architectures are designed using pipelined fused floating-point operations on complex data using IEEE standard-754 format. FFT architecture uses a three-stage pipelined butterfly structure with pipelined fused floating-point units (FFPU) and multiplexers to produce the desired low-power and area-efficient architectures. Variable length floating-point FFT architecture is implemented by considering the combinations of radix-23 / 22 / 21 butterfly operations to produce 2/4/8/16/32/ 64/128/256/512/1024(1K)/2048(2K)/4096(4K) point FFT sizes. This is achieved by using fused floating-point units, an FFT size selector, a twiddle factor generator, and complex multiplier sub-blocks that are controlled by a control unit.

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Über die Autorin bzw. den Autor

Dr. M. Madhu Babu works at JNTUA, College of Engineering Ananthapuramu. He has been awarded Ph.D. in Electronics and Communication Engineering. M.Tech. in VLSI System Design JNTU Hyderabad. Dr. K. Rama Naidu M.Tech Ph.D.(IIT Kharagpur) Project Manager at IIITDM Kurnool, former professor in E.C.E Department JNTUA CEA.

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Verlag
LAP LAMBERT Academic Publishing
Erscheinungsdatum
2023
Sprache
Englisch
ISBN 10 
6206156427
ISBN 13 
9786206156420
Einband
Taschenbuch
Anzahl der Seiten
132
Kontakt zum Hersteller
SIA OmniScriptum Publishing
customerservice@vdm-vsg.de

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