CMOS Circuit Design, Layout, and Simulation, Second Edition

R. Jacob Baker

ISBN 10: 047170055X / ISBN 13: 9780471700555

Verlag: Wiley-IEEE Press, 2004

Beschreibung

Bestandsnummer des Verkäufers 047170055X-3-34030421

Bibliografische Details

Titel: CMOS Circuit Design, Layout, and Simulation,...

Verlag: Wiley-IEEE Press

Erscheinungsdatum: 2004

Einband: hardcover

Zustand: Good

Auflage: 2. Auflage

Über diesen Titel

Inhaltsangabe:

This book is a 2007 Winner of the Frederick Emmons Terman Award. "CMOS: Circuit Design, Layout, and Simulation, Second Edition" covers the practical design of both analog and digital integrated circuits, offering a vital contemporary view of a wide range of analog/digital circuit blocks, the BSIM model, data converter architectures, and much more. This edition takes a two path approach to the topics; design techniques are developed for both long and short channel CMOS technologies and then compared. The results are multidimensional explanations that allow readers deep insight into the design process. The features include: integrated circuit layout software for Windows designed by David Boyce; updated materials to reflect CMOS technology's movement into nanometer sizes; discussions on phase and delay locked loops, mixed signal circuits, data converters, and circuit noise; more than 1,000 figures, 200 examples, and over 500 end of chapter problems; and in depth coverage of both analog and digital circuit level design techniques. It also includes: real world process parameters and design rules; and an associated Web site, which provides examples, solutions, and SPICE simulation netlists. An Instructor's Manual presenting detailed solutions to all the problems in the book is available upon request from the Wiley Makerting Department.

Über die Autorin bzw. den Autor:

R. JACOB (JAKE) BAKER is a professor of electrical engineering at Boise State University. He teaches several courses on CMOS analog and digital circuit design and has consulted internationally in these areas. Jake holds over seventy-five granted or pending patents in integrated circuit design.