Co-Design for System Acceleration: A Quantitative Approach

Nedjah N

ISBN 10: 1402055455 / ISBN 13: 9781402055454

Verlag: Springer, 2007

Beschreibung

Bestandsnummer des Verkäufers ABLIING23Mar2411530143717

Bibliografische Details

• Titel: Co-Design for System Acceleration: A Quantitative Approach
• Verlag: Springer
• Erscheinungsjahr: 2007
• Sprache: Englisch
• ISBN-10: 1402055455
• ISBN-13: 9781402055454
• Einband: Hardcover
• Zustand: New

Über diesen Titel

Inhaltsangabe

This book is concerned with studying the co-design methodology in general, and how to determine the more suitable interface mechanism in a co-design system in particular. This is based on the characteristics of the application and those of the target architecture of the system. Guidelines are provided to support the designer's choice of the interface mechanism. Some new trends in co-design and system acceleration are also introduced.

Von der hinteren Coverseite

In Co-Design for System Acceleration, we are concerned with studying the co-design methodology, in general, and how to determine the more suitable interface mechanism in a co-design system, in particular. This will be based on the characteristics of the application and those of the target architecture of the system. We provide guidelines to support the designer's choice of the interface mechanism. The content of Co-Design for System Acceleration is divided into eight chapters. We present co-design as a methodology for the integrated design of systems implemented using both hardware and software components. This includes high-level synthesis and the new technologies available for its implementation. The physical co-design system is then presented. The development route adopted is discussed and the target architecture described. The relation between the execution times and the interface mechanisms is analyzed. In order to investigate the performance of the co-designsystem for different characteristics of the application and of the architecture, we developed a VHDL model of our co-design system. The timing characteristics of the system are introduced, that is times for parameter passing and bus arbitration for each interface mechanism, together with their handshake completion times. The relation between the coprocessor memory accesses and the interface mechanisms is then studied. Several memory configurations are presented and studied: single-port memory, dual-port memory and cache memory. We also introduce some new trends in co-design and system acceleration.