Co-verification of Hardware and Software for ARM SoC Design (Embedded Technology)

Andrews, Jason

ISBN 10: 0750677309 / ISBN 13: 9780750677301

Verlag: Newnes, 2004

Beschreibung

Like New.

Bestandsnummer des Verkäufers ERICA75807506773095

Bibliografische Details

• Titel: Co-verification of Hardware and Software for ARM SoC Design (Embedded Technology)
• Verlag: Newnes
• Erscheinungsjahr: 2004
• Sprache: Englisch
• ISBN-10: 0750677309
• ISBN-13: 9780750677301
• Einband: Paperback
• Zustand: Like New
• Buchtyp: book

Über diesen Titel

Inhaltsangabe

Hardware/software co-verification is how to make sure that embedded system software works correctly with the hardware, and that the hardware has been properly designed to run the software successfully -before large sums are spent on prototypes or manufacturing. This is the first book to apply this verification technique to the rapidly growing field of embedded systems-on-a-chip(SoC). As traditional embedded system design evolves into single-chip design, embedded engineers must be armed with the necessary information to make educated decisions about which tools and methodology to deploy. SoC verification requires a mix of expertise from the disciplines of microprocessor and computer architecture, logic design and simulation, and C and Assembly language embedded software. Until now, the relevant information on how it all fits together has not been available. Andrews, a recognized expert, provides in-depth information about how co-verification really works, how to be successful using it, and pitfalls to avoid. He illustrates these concepts using concrete examples with the ARM core - a technology that has the dominant market share in embedded system product design. The companion CD-ROM contains all source code used in the design examples, a searchable e-book version, and useful design tools.

Über die Autorin bzw. den Autor

Jason Andrews is currently working in the areas of hardware/software co-verification and testbench methodology for SoC design at Verisity. He has implemented multiple commercial co-verification tools as well as many custom co-verification solutions. His experience in the EDA and embedded marketplace includes software development and product management at Verisity, Axis Systems, Simpod, Summit Design, and Simulation Technologies. He has presented technical papers and tutorials at the Embedded Systems Conference, Communication Design Conference and IP/SoC and written numerous articles related to HW/SW co-verification and design verification. He has a B.S. in electrical engineering from The Citadel, Charleston, S.C., and an M.S. in electrical engineering from the University of Minnesota. He currently lives in the Minneapolis area with his wife, Deborah, and their four children.