Uses Verilog HDL to illustrate computer architecture and microprocessor design, allowing readers to readily simulate and adjust the operation of each design, and thus build industrially relevant skills

Introduces the computer principles, computer design, and how to use Verilog HDL (Hardware Description Language) to implement the design
Provides the skills for designing processor/arithmetic/cpu chips, including the unique application of Verilog HDL material for CPU (central processing unit) implementation
Despite the many books on Verilog and computer architecture and microprocessor design, few, if any, use Verilog as a key tool in helping a student to understand these design techniques
A companion website includes color figures, Verilog HDL codes, extra test benches not found in the book, and PDFs of the figures and simulation waveforms for instructors

�ber die Autorin bzw. den Autor

Yamin Li, Professor, Department of Computer Science, Hosei University, Tokyo, Japan.
Professor Li received his PhD in computer science from Tsinghua University in 1989. His research interests include computer arithmetic algorithms, computer architecture, CPU design, and parallel & distributed computing. He is a senior member of the IEEE and a member of the IEEE Computer Society. Professor Li has taught the courses of "Logic Circuit Design", "Assembly Language Programming", "Computer Organization and Design", "CPU Design in Verilog HDL", "Computer Architecture", and "Parallel & Distributed Systems" for more than 20 years, and has used FPGA boards and CAD/CAE tools to teach these courses since 1993. He has published more than 100 journal and conference papers, and developed a square root circuit at low cost and published it in IEEE ICCD'96 and ICCD'97.

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