This book describes the various tradeoffs systems designers face when designing embedded memory. Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test. The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory.

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� Provides a comprehensive overview of embedded memory design and associated challenges and choices;

� Explains tradeoffs and dependencies across different disciplines involved with multi-core and system on chip memory design;

� Includes detailed discussion of memory hierarchy and its impact on energy and performance;

� Uses real product examples to demonstrate embedded memory design flow from architecture, to circuit design, design for test and yield analysis.

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Edward Bowditch Ltd
Exstowe, Exton, Exeter, EX3 0PP, United Kingdom

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