Guide to RISC Processors | For Programmers and Engineers

Sivarama P Dandamudi

ISBN 10: 144191935X / ISBN 13: 9781441919359

Verlag: Springer New York, 2010

Guide to RISC Processors | For Programmers and Engineers | Sivarama P Dandamudi | Taschenbuch | xvi | Englisch | 2010 | Springer New York | EAN 9781441919359 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu. Bestandsnummer des Verkäufers 107253279

Inhaltsangabe:

Here is an accessible, comprehensive guide to all the popular modern RISC (Reduced Instruction Set Computer) processors: MIPS, SPARC, PowerPC, ARM and Itanium. It details RISC design principles as well as explains the differences between RISC and CISC designs. It also covers MIPS assembly language programming. Professionals and programmers seeking an authoritative and practical overview of RISC processors will find the guide an essential resource. 

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Recently, there has been a trend toward processor design based on the RISC (Reduced Instruction Set Computer) model: Example RISC processors are the MIPS, SPARC, PowerPC, ARM, and even Intels 64-bit processor Itanium.

This guidebook provides an accessible and all-encompassing compendium on RISC processors, introducing five RISC processors: MIPS, SPARC, PowerPC, ARM, and Itanium. Initial chapters explain the differences between the CISC and RISC designs and clearly discuss the core RISC design principles. The text then integrates instruction on MIPS assembly language programming, thereby enabling readers to concretely grasp concepts and principles introduced earlier. Readers need only have a basic knowledge of any structured, high-level language to obtain the full benefits here.

Features:

*Includes MIPS simulator (SPIM) download instructions, so that readers can get hands-on assembly language programming experience

*Presents material in a manner suitable for flexible self-study

Assembly language programs permit reader executables using the SPIM simulator

Integrates core concepts to processor designs and their implementations

Supplies extensive and complete programming examples and figures

Contains chapter-by-chapter overviews and summaries

* Provides source code for the MIPS language at the books website

Guide to RISC Processors provides a uniquely comprehensive introduction and guide to RISC-related concepts, principles, design philosophy, and actual programming, as well as the all the popular modern RISC processors and their assembly language. Professionals, programmers, and students seeking an authoritative and practical overview of RISC processors and assembly language programming will find the guide an essential resource.

Sivarama P. Dandamudi is a professor of computer science at Carleton University in Ottawa, Ontario, Canada, as well as associate editor responsible for computer architecture at the International Journal of Computers and Their Applications. He has more than two decades of experience teaching about computer systems and organization.

Key Topics

* Processor design issues

* Evolution of CISC and RISC processors

* MIPS, SPARC, PowerPC, Itanium, and ARM architectures

* MIPS assembly language

* SPIM simulator and debugger

* Conditional execution

* Floating-point and logical and shift operations

* Number systems

Computer Architecture/Programming

Beginning/Intermediate Level

Bibliografische Details

Titel: Guide to RISC Processors | For Programmers ...
Verlag: Springer New York
Erscheinungsdatum: 2010
Einband: Taschenbuch
Zustand: Neu