SAT-Based Scalable Formal Verification Solutions

Malay Ganai|Aarti Gupta

ISBN 10: 1441943412 / ISBN 13: 9781441943415

Verlag: Springer US, 2010

Beschreibung

Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Describes SAT-based model checking approaches and gives engineering details on what makes model checking practicalTechniques covered can be synergistically combined into a scalabe solutionFocuses on engineering design and not mathematics.

Bestandsnummer des Verkäufers 4174692

Bibliografische Details

• Titel: SAT-Based Scalable Formal Verification Solutions
• Verlag: Springer US
• Erscheinungsjahr: 2010
• Sprache: Englisch
• ISBN-10: 1441943412
• ISBN-13: 9781441943415
• Einband: Softcover
• Zustand: New

Über diesen Titel

Inhaltsangabe

Functional Verification has become an important aspect of the design process. Significant resources, both in industry and academia, are devoted to bridging the gap between design complexity and verification efforts. This book provides an engineering insight into how to provide a scalable and robust verification solution with ever increasing design complexity and sizes. With growing interests in SAT-based approaches for formal verification and increasing dissatisfaction twoard BDD-based approaches, this book brings together the various SAT-based scalable emerging technologies. Though the approaches described in the book are based on well-founded mathematics, the discussion is generally restricted to the engineering aspect for the ease of readability. Readers will also be exposed to the specific strengths of the various approaches in regard to the applicability.

Von der hinteren Coverseite

Functional verification has become an important aspect of the chip design process. Significant resources, both in industry and academia, are devoted to the design complexity and verification endeavors.

SAT-Based Scalable Formal Verification Solutions discusses in detail several of the latest and interesting scalable SAT-based techniques including: Hybrid SAT Solver, Customized Bounded/Unbounded Model Checking, Distributed Model Checking, Proofs and Proof-based Abstraction Methods, Verification of Embedded Memory System & Multi-clock Systems, and Synthesis for Verification Paradigm. These techniques have been designed and implemented in a verification platform Verisol (formally called DiVer) and have been used successfully in industry. This book provides algorithmic details and engineering insights into devising scalable approaches for an effective realization. It also includes the authors practical experiences and recommendations in verifying the large industry designs using VeriSol.

The book is primarily written for researchers, scientists, and verification engineers who would like to gain an in-depth understanding of scalable SAT-based verification techniques. The book will also be of interest for CAD tool developers who would like to incorporate various SAT-based advanced techniques in their products.