System-on-a-Chip Verification : Methodology and Techniques

Prakash Rashinkar

ISBN 10: 1475774680 / ISBN 13: 9781475774689

Verlag: Springer US, Springer New York, 2013

Beschreibung

Druck auf Anfrage Neuware - Printed after ordering - System-On-a-Chip Verification: Methodology and Techniques is the first book to cover verification strategies and methodologies for SOC verification from system level verification to the design sign- off. The topics covered include Introduction to the SOC design and verification aspects, System level verification in brief, Block level verification, Analog/mixed signal simulation, Simulation, HW/SW Co-verification, Static netlist verification, Physical verification, and Design sign-off in brief. All the verification aspects are illustrated with a single reference design for Bluetooth application. System-On-a-Chip Verification: Methodology and Techniques takes a systematic approach that covers the following aspects of verification strategy in each chapter: Explanation of the objective involved in performing verification after a given design step; Features of options available; When to use a particular option; How to select an option; and Limitations of the option. This exciting new book will be of interest to all designers and test professionals.

Bestandsnummer des Verkäufers 9781475774689

Bibliografische Details

• Titel: System-on-a-Chip Verification : Methodology and Techniques
• Verlag: Springer US, Springer New York
• Erscheinungsjahr: 2013
• Sprache: Englisch
• ISBN-10: 1475774680
• ISBN-13: 9781475774689
• Einband: Taschenbuch
• Zustand: Neu
• Abmessungen: 235B x 155 H x 22 T Millimeter Breite: 235 mm, Höhe: 155 mm, Tiefe: 22 mm
• Gewicht: 598 Gramm

Über diesen Titel

Inhaltsangabe

System-On-a-Chip Verification: Methodology and Techniques is the first book to cover verification strategies and methodologies for SOC verification from system level verification to the design sign- off. The topics covered include Introduction to the SOC design and verification aspects, System level verification in brief, Block level verification, Analog/mixed signal simulation, Simulation, HW/SW Co-verification, Static netlist verification, Physical verification, and Design sign-off in brief. All the verification aspects are illustrated with a single reference design for Bluetooth application.
System-On-a-Chip Verification: Methodology and Techniques takes a systematic approach that covers the following aspects of verification strategy in each chapter:

1. Explanation of the objective involved in performing verification after a given design step;
2. Features of options available;
3. When to use a particular option;
4. How to select an option; and
5. Limitations of the option.

This exciting new book will be of interest to all designers and test professionals.

Reseña del editor

This is the first book to cover verification strategies and methodologies for SOC verification from system level verification to the design sign-off. All the verification aspects in this exciting new book are illustrated with a single reference design for Bluetooth application.