Tutorial: Test Generation for Vlsi Chips

Vishwani D. Agrawal et Sharad C. Seth

ISBN 10: 081868786X / ISBN 13: 9780818687860

Verlag: IEEE Computer Society, 1988

Beschreibung

Ancien livre de bibliothèque. Petite(s) trace(s) de pliure sur la couverture. Légères traces d'usure sur la couverture. Salissures sur la tranche. Couverture différente. Edition 1988. Ammareal reverse jusqu'à 15% du prix net de cet article à des organisat ENGLISH DESCRIPTION Book Condition: Used, Good. Former library book. Slightly creased cover. Slight signs of wear on the cover. Stains on the edge. Different cover. Edition 1988. Ammareal gives back up to 15% of this item's net price to charity organizations.

Bestandsnummer des Verkäufers E-812-693

Bibliografische Details

• Titel: Tutorial: Test Generation for Vlsi Chips
• Verlag: IEEE Computer Society
• Erscheinungsjahr: 1988
• Sprache: Englisch
• ISBN-10: 081868786X
• ISBN-13: 9780818687860
• Einband: Hardcover
• Zustand: Bon

Über diesen Titel

Inhaltsangabe

Reprints of papers taken from 18 different journals, published between 1967 and 1987. They give a comprehensive overview of very large-scale integration testing. No significant prior experience in testing is assumed. Concepts and current practices are emphasized. Chapters are preceded by a tutorial. Graphs and illustrations are featured in most pages. Topics include fault modeling, test generation, test evaluation, testability analysis, design for testability, and automatic test equipment. Annotation copyright Book News, Inc. Portland, Or.

Reseña del editor

Reprints of papers taken from 18 different journals, published between 1967 and 1987. They give a comprehensive overview of very large-scale integration testing. No significant prior experience in testing is assumed. Concepts and current practices are emphasized. Chapters are preceded by a tutorial.