VLSI Physical Design: From Graph Partitioning to Timing Closure

Andrew B. Kahng

ISBN 10: 904819590X / ISBN 13: 9789048195909

Verlag: Springer, 2011

Beschreibung

This item is in overall good condition. Covers and dust jackets are intact but may have minor wear including slight curls or bends to corners as well as cosmetic blemishes including stickers. Pages are intact but may have minor highlighting/ writing. Binding is intact; however, spine may have slight wear overall. Digital codes may not be included and have not been tested to be redeemable and/or active. Minor shelf wear overall. Please note that all items are donated goods and are in used condition. Orders shipped Monday through Friday! Your purchase helps put people to work and learn life skills to reach their full potential. Orders shipped Monday through Friday. Your purchase helps put people to work and learn life skills to reach their full potential. Thank you! Bestandsnummer des Verkäufers 466SUS002UCE

Bibliografische Details

Titel: VLSI Physical Design: From Graph ...

Verlag: Springer

Erscheinungsdatum: 2011

Einband: Hardcover

Zustand: Good

Über diesen Titel

Inhaltsangabe:

Design and optimization of integrated circuits are essential to the creation of new semiconductor chips, and physical optimizations are becoming more prominent as a result of semiconductor scaling. Modern chip design has become so complex that it is largely performed by specialized software, which is frequently updated to address advances in semiconductor technologies and increased problem complexities. A user of such software needs a high-level understanding of the underlying mathematical models and algorithms. On the other hand, a developer of such software must have a keen understanding of computer science aspects, including algorithmic performance bottlenecks and how various algorithms operate and interact. VLSI Physical Design: From Graph Partitioning to Timing Closure introduces and compares algorithms that are used during the physical design phase of integrated-circuit design, wherein a geometric chip layout is produced starting from an abstract circuit design. The emphasis is on essential and fundamental techniques, ranging from hypergraph partitioning and circuit placement to timing closure.

Über die Autorin bzw. den Autor:

Andrew B. Kahng is Professor of CSE and ECE at UC San Diego, where he holds the endowed chair in High-Performance Computing. He has served as visiting scientist at Cadence (1995-1997) and as founder, chairman and CTO at Blaze DFM (2004-2006).

Jens Lienig is Professor of Electrical Engineering at TU Dresden. He is also the director of the Institute of Electromechanical and Electronic Design at TUD. He has worked as project manager at Tanner Research, Inc. (1996-1999) and Robert Bosch GmbH (1999-2002).

Igor L. Markov is a Professor of Electrical Engineering and Computer Science at the University of Michigan. He has worked at Google (2014-2017) and has been with Facebook since 2018.

Jin Hu was a PhD student at the Computer Science and Engineering (CSE) Division at the University of Michigan. Afterwards, she has been with IBM Corp. (2013-2017) and Bloomberg L.P.