Anbieter: Universitätsbuchhandlung Herta Hold GmbH, Berlin, Deutschland
XIV, 171 p. Hardcover. Versand aus Deutschland / We dispatch from Germany via Air Mail. Einband bestoßen, daher Mängelexemplar gestempelt, sonst sehr guter Zustand. Imperfect copy due to slightly bumped cover, apart from this in very good condition. Stamped. Stamped. Sprache: Englisch.
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In den WarenkorbHardcover. Zustand: Brand New. 2015 edition. 171 pages. 9.25x6.25x0.75 inches. In Stock.
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Sprache: Englisch
Verlag: Springer International Publishing, 2016
ISBN 10: 3319356100 ISBN 13: 9783319356105
Anbieter: AHA-BUCH GmbH, Einbeck, Deutschland
Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book describes automated debugging approaches for the bugs and the faults which appear in different abstraction levels of a hardware system. The authors employ a transaction-based debug approach to systems at the transaction-level, asserting the correct relation of transactions. The automated debug approach for design bugs finds the potential fault candidates at RTL and gate-level of a circuit. Debug techniques for logic bugs and synchronization bugs are demonstrated, enabling readers to localize the most difficult bugs. Debug automation for electrical faults (delay faults)finds the potentially failing speedpaths in a circuit at gate-level. The various debug approaches described achieve high diagnosis accuracy and reduce the debugging time, shortening the IC development cycle and increasing the productivity of designers.Describes a unified framework for debug automation used at both pre-silicon and post-silicon stages;Provides approaches for debug automation of a hardware system at different levels of abstraction, i.e., chip, gate-level, RTL and transaction level;Includes techniques for debug automation of design bugs and electrical faults, as well as an infrastructure to debug NoC-based multiprocessor SoCs.
Sprache: Englisch
Verlag: Springer International Publishing, 2014
ISBN 10: 3319093088 ISBN 13: 9783319093086
Anbieter: AHA-BUCH GmbH, Einbeck, Deutschland
Buch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book describes automated debugging approaches for the bugs and the faults which appear in different abstraction levels of a hardware system. The authors employ a transaction-based debug approach to systems at the transaction-level, asserting the correct relation of transactions. The automated debug approach for design bugs finds the potential fault candidates at RTL and gate-level of a circuit. Debug techniques for logic bugs and synchronization bugs are demonstrated, enabling readers to localize the most difficult bugs. Debug automation for electrical faults (delay faults)finds the potentially failing speedpaths in a circuit at gate-level. The various debug approaches described achieve high diagnosis accuracy and reduce the debugging time, shortening the IC development cycle and increasing the productivity of designers.Describes a unified framework for debug automation used at both pre-silicon and post-silicon stages;Provides approaches for debug automation of a hardware system at different levels of abstraction, i.e., chip, gate-level, RTL and transaction level;Includes techniques for debug automation of design bugs and electrical faults, as well as an infrastructure to debug NoC-based multiprocessor SoCs.
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Zustand: Gut. Zustand: Gut | Sprache: Englisch | Produktart: Bücher | Keine Beschreibung verfügbar.
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In den WarenkorbZustand: Hervorragend. Zustand: Hervorragend | Sprache: Englisch | Produktart: Bücher | After producing a chip, the functional correctness of the integrated circuit has to be checked. Otherwise products with malfunctions would be delivered to customers, which is not acceptable for any company. Many algorithms for "Automatic Test Pattern Generation" (ATPG) have been proposed in the last 30 years. But due to the ever increasing design complexity, new techniques have to be developed that can cope with today's circuits. While classical approaches are based on backtracking on the circuit structure, several approaches based on "Boolean Satisfiability" (SAT) have been proposed since the early 80s. In Test Pattern Generation using Boolean Proof Engines, we give an introduction to ATPG. The basic concept and classical ATPG algorithms are reviewed. Then, the formulation as a SAT problem is considered. As the underlying engine, modern SAT solvers and their use on circuit related problems are comprehensively discussed. Advanced techniques for SAT-based ATPG are introduced and evaluated in the context of an industrial environment. The chapters of the book cover efficient instance generation, encoding of multiple-valued logic, usage of various fault models, and detailed experiments on multi-million gate designs. The book describes the state of the art in the field, highlights research aspects, and shows directions for future work.