9780792395973 - vhdl modeling for digital design synthesis von yu-chin hsu; tsai, kevin f.; liu, jessie t.; lin, eric s. (10 Ergebnisse)

- Hardcover
Anbieter: moluna, Greven, , Deutschlandmoluna
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 180,07
EUR 48,99 VersandVersand von Deutschland nach USAAnzahl: Mehr als 20 verfügbar
Gebunden. Zustand: New.

- Hardcover
Anbieter: Ria Christie Collections, Uxbridge, Vereinigtes KönigreichRia Christie Collections
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 225,65
EUR 13,88 VersandVersand von Vereinigtes Königreich nach USAAnzahl: Mehr als 20 verfügbar
Zustand: New. In.

- Hardcover
Anbieter: Buchpark, Trebbin, , DeutschlandBuchpark
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Gebraucht - Sehr gut
EUR 154,42
EUR 105,00 VersandVersand von Deutschland nach USAAnzahl: 1 verfügbar
Zustand: Sehr gut. Zustand: Sehr gut | Seiten: 380 | Sprache: Englisch | Produktart: Bücher | The purpose of this book is to introduce VHSIC Hardware Description Lan guage (VHDL) and its use for synthesis. VHDL is a hardware description language which provides a means of specifying a digital system over different levels of abst…raction. It supports behavior specification during the early stages of a design process and structural specification during the later implementation stages. VHDL was originally introduced as a hardware description language that per mitted the simulation of digital designs. It is now increasingly used for design specifications that are given as the input to synthesis tools which translate the specifications into netlists from which the physical systems can be built. One problem with this use of VHDL is that not all of its constructs are useful in synthesis. The specification of delay in signal assignments does not have a clear meaning in synthesis, where delays have already been determined by the im plementationtechnolo~y. VHDL has data-structures such as files and pointers, useful for simulation purposes but not for actual synthesis. As a result synthe sis tools accept only subsets of VHDL. This book tries to cover the synthesis aspect of VHDL, while keeping the simulation-specifics to a minimum. This book is suitable for working professionals as well as for graduate or under graduate study. Readers can view this book as a way to get acquainted with VHDL and how it can be used in modeling of digital designs.

- Hardcover
Anbieter: Books Puddle, New York, NY, USABooks Puddle
Verkäufer/-in kontaktierenVerkäufer/-in mit 4 SternenZustand: Neu
EUR 277,41
EUR 3,45 VersandVersand innerhalb von USAAnzahl: 4 verfügbar
Zustand: New. pp. 380.

- Hardcover
Anbieter: AHA-BUCH GmbH, Einbeck, DeutschlandAHA-BUCH GmbH
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 223,11
EUR 63,68 VersandVersand von Deutschland nach USAAnzahl: 1 verfügbar
Buch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - The purpose of this book is to introduce VHSIC Hardware Description Lan guage (VHDL) and its use for synthesis. VHDL is a hardware description language which provides a means of specifying a digital system over different levels of abstraction. It supports b…ehavior specification during the early stages of a design process and structural specification during the later implementation stages. VHDL was originally introduced as a hardware description language that per mitted the simulation of digital designs. It is now increasingly used for design specifications that are given as the input to synthesis tools which translate the specifications into netlists from which the physical systems can be built. One problem with this use of VHDL is that not all of its constructs are useful in synthesis. The specification of delay in signal assignments does not have a clear meaning in synthesis, where delays have already been determined by the im plementationtechnolo~y. VHDL has data-structures such as files and pointers, useful for simulation purposes but not for actual synthesis. As a result synthe sis tools accept only subsets of VHDL. This book tries to cover the synthesis aspect of VHDL, while keeping the simulation-specifics to a minimum. This book is suitable for working professionals as well as for graduate or under graduate study. Readers can view this book as a way to get acquainted with VHDL and how it can be used in modeling of digital designs.

- Hardcover
- Print-on-Demand
Anbieter: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, , DeutschlandBuchWeltWeit Ludwig Meier e.K.
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 213,99
EUR 23,00 VersandVersand von Deutschland nach USAAnzahl: 2 verfügbar
Buch. Zustand: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The purpose of this book is to introduce VHSIC Hardware Description Lan guage (VHDL) and its use for synthesis. VHDL is a hardware description language which provides a means of specifying a digital system over different levels of abstractio…n. It supports behavior specification during the early stages of a design process and structural specification during the later implementation stages. VHDL was originally introduced as a hardware description language that per mitted the simulation of digital designs. It is now increasingly used for design specifications that are given as the input to synthesis tools which translate the specifications into netlists from which the physical systems can be built. One problem with this use of VHDL is that not all of its constructs are useful in synthesis. The specification of delay in signal assignments does not have a clear meaning in synthesis, where delays have already been determined by the im plementationtechnolo~y. VHDL has data-structures such as files and pointers, useful for simulation purposes but not for actual synthesis. As a result synthe sis tools accept only subsets of VHDL. This book tries to cover the synthesis aspect of VHDL, while keeping the simulation-specifics to a minimum. This book is suitable for working professionals as well as for graduate or under graduate study. Readers can view this book as a way to get acquainted with VHDL and how it can be used in modeling of digital designs. 380 pp. Englisch.

- Hardcover
- Print-on-Demand
Anbieter: preigu, Osnabrück, Deutschlandpreigu
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 186,70
EUR 70,00 VersandVersand von Deutschland nach USAAnzahl: 5 verfügbar
Buch. Zustand: Neu. VHDL Modeling for Digital Design Synthesis | Yu-Chin Hsu (u. a.) | Buch | Einband - fest (Hardcover) | Englisch | 1995 | Springer US | EAN 9780792395973 | Verantwortliche Person für die EU: Springer Heidelberg, Tiergartenstr. 17, 69121 Heidelberg, buchhandel-buch[at]springer[dot]com | Anbieter: preigu Print o…n Demand.

- Hardcover
- Print-on-Demand
Anbieter: buchversandmimpf2000, Emtmannsberg, BAYE, Deutschlandbuchversandmimpf2000
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 213,99
EUR 60,00 VersandVersand von Deutschland nach USAAnzahl: 1 verfügbar
Buch. Zustand: Neu. This item is printed on demand - Print on Demand Titel. Neuware -The purpose of this book is to introduce VHSIC Hardware Description Lan guage (VHDL) and its use for synthesis. VHDL is a hardware description language which provides a means of specifying a digital system over different levels of abstraction. I…t supports behavior specification during the early stages of a design process and structural specification during the later implementation stages. VHDL was originally introduced as a hardware description language that per mitted the simulation of digital designs. It is now increasingly used for design specifications that are given as the input to synthesis tools which translate the specifications into netlists from which the physical systems can be built. One problem with this use of VHDL is that not all of its constructs are useful in synthesis. The specification of delay in signal assignments does not have a clear meaning in synthesis, where delays have already been determined by the im plementationtechnolo~y. VHDL has data-structures such as files and pointers, useful for simulation purposes but not for actual synthesis. As a result synthe sis tools accept only subsets of VHDL. This book tries to cover the synthesis aspect of VHDL, while keeping the simulation-specifics to a minimum. This book is suitable for working professionals as well as for graduate or under graduate study. Readers can view this book as a way to get acquainted with VHDL and how it can be used in modeling of digital designs.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 380 pp. Englisch.

- Hardcover
- Print-on-Demand
Anbieter: Majestic Books, Hounslow, , Vereinigtes KönigreichMajestic Books
Verkäufer/-in kontaktierenVerkäufer/-in mit 4 SternenZustand: Neu
EUR 293,11
EUR 7,53 VersandVersand von Vereinigtes Königreich nach USAAnzahl: 4 verfügbar
Zustand: New. Print on Demand pp. 380 52:B&W 6.14 x 9.21in or 234 x 156mm (Royal 8vo) Case Laminate on White w/Gloss Lam.

- Hardcover
- Print-on-Demand
Anbieter: Biblios, frankfurt am main, HESSE, DeutschlandBiblios
Verkäufer/-in kontaktierenVerkäufer/-in mit 4 SternenZustand: Neu
EUR 292,92
EUR 9,95 VersandVersand von Deutschland nach USAAnzahl: 4 verfügbar
Zustand: New. PRINT ON DEMAND pp. 380.