Isbn: 9786139453023 - low power fault tolerant latches and flip-flops: design and performance analysis (9 Ergebnisse)

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Taschenbuch. Zustand: Neu. Low Power Fault Tolerant Latches and Flip-flops | Design and performance Analysis | Sumitra Singar (u. a.) | Taschenbuch | 152 S. | Englisch | 2019 | LAP LAMBERT Academic Publishing | EAN 9786139453023 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.…

Zustand: Sehr gut. Zustand: Sehr gut | Sprache: Englisch | Produktart: Bücher | Today, the latches and flip-flops are widely used for data storage. This book focus on review, study and design of fault tolerant circuits to reduce circuit level faults and protect a circuit from faults. In this book, eight novel low power fault tolerant latches and four glitch free flip-flops are discussed. The latch configurations are designed with the 1P-2N structure and 2P-1N structure or 1P-2N structure, 2P-1N structure and C-element structure. If any transient fault affects one of the structure, then it is corrected by the other structure. The glitch free dual edge triggered flip flops are the novel and unique designs. Till now, existing DET-FF designs are constructed by using either C-element circuit or 1P-2N structure or 2P-1N structure but proposed novel designs are designed by using the combination of C-element circuit and 2P-1N structure or C-element circuit and 1P-2N structure. The glitch free novel DET-FFs provide the totally glitch free output and can increase the system efficiency. The potential novelty of this work is that the presented novel designs can reduce the 50% power consumption and contribute to the total system power savings. …

Zustand: Hervorragend. Zustand: Hervorragend | Sprache: Englisch | Produktart: Bücher | Today, the latches and flip-flops are widely used for data storage. This book focus on review, study and design of fault tolerant circuits to reduce circuit level faults and protect a circuit from faults. In this book, eight novel low power fault tolerant latches and four glitch free flip-flops are discussed. The latch configurations are designed with the 1P-2N structure and 2P-1N structure or 1P-2N structure, 2P-1N structure and C-element structure. If any transient fault affects one of the structure, then it is corrected by the other structure. The glitch free dual edge triggered flip flops are the novel and unique designs. Till now, existing DET-FF designs are constructed by using either C-element circuit or 1P-2N structure or 2P-1N structure but proposed novel designs are designed by using the combination of C-element circuit and 2P-1N structure or C-element circuit and 1P-2N structure. The glitch free novel DET-FFs provide the totally glitch free output and can increase the system efficiency. The potential novelty of this work is that the presented novel designs can reduce the 50% power consumption and contribute to the total system power savings.…

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Taschenbuch. Zustand: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Today, the latches and flip-flops are widely used for data storage. This book focus on review, study and design of fault tolerant circuits to reduce circuit level faults and protect a circuit from faults. In this book, eight novel low power fault tolerant latches and four glitch free flip-flops are discussed. The latch configurations are designed with the 1P-2N structure and 2P-1N structure or 1P-2N structure, 2P-1N structure and C-element structure. If any transient fault affects one of the structure, then it is corrected by the other structure. The glitch free dual edge triggered flip flops are the novel and unique designs. Till now, existing DET-FF designs are constructed by using either C-element circuit or 1P-2N structure or 2P-1N structure but proposed novel designs are designed by using the combination of C-element circuit and 2P-1N structure or C-element circuit and 1P-2N structure. The glitch free novel DET-FFs provide the totally glitch free output and can increase the system efficiency. The potential novelty of this work is that the presented novel designs can reduce the 50% power consumption and contribute to the total system power savings. 152 pp. Englisch. …

Taschenbuch. Zustand: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Today, the latches and flip-flops are widely used for data storage. This book focus on review, study and design of fault tolerant circuits to reduce circuit level faults and protect a circuit from faults. In this book, eight novel low power fault tolerant latches and four glitch free flip-flops are discussed. The latch configurations are designed with the 1P-2N structure and 2P-1N structure or 1P-2N structure, 2P-1N structure and C-element structure. If any transient fault affects one of the structure, then it is corrected by the other structure. The glitch free dual edge triggered flip flops are the novel and unique designs. Till now, existing DET-FF designs are constructed by using either C-element circuit or 1P-2N structure or 2P-1N structure but proposed novel designs are designed by using the combination of C-element circuit and 2P-1N structure or C-element circuit and 1P-2N structure. The glitch free novel DET-FFs provide the totally glitch free output and can increase the system efficiency. The potential novelty of this work is that the presented novel designs can reduce the 50% power consumption and contribute to the total system power savings.…

Kartoniert / Broschiert. Zustand: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Singar SumitraDr. Sumitra Singar has received her PhD (Engineering) from Mody University of Science and Technology, Lakshmangarh, Sikar, Rajasthan, India in 2018. She has completed her M.Tech. in VLSI Design, in 2013. She has done B. …

Taschenbuch. Zustand: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Today, the latches and flip-flops are widely used for data storage. This book focus on review, study and design of fault tolerant circuits to reduce circuit level faults and protect a circuit from faults. In this book, eight novel low power fault tolerant latches and four glitch free flip-flops are discussed. The latch configurations are designed with the 1P-2N structure and 2P-1N structure or 1P-2N structure, 2P-1N structure and C-element structure. If any transient fault affects one of the structure, then it is corrected by the other structure. The glitch free dual edge triggered flip flops are the novel and unique designs. Till now, existing DET-FF designs are constructed by using either C-element circuit or 1P-2N structure or 2P-1N structure but proposed novel designs are designed by using the combination of C-element circuit and 2P-1N structure or C-element circuit and 1P-2N structure. The glitch free novel DET-FFs provide the totally glitch free output and can increase the system efficiency. The potential novelty of this work is that the presented novel designs can reduce the 50% power consumption and contribute to the total system power savings.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 152 pp. Englisch.…