Design systems chip test (36 Ergebnisse)
Design of Systems on a Chip: Design and Test.
Reis, Ricardo; Lubaszewski, Marcelo; Jess, Jochen A.G. (Eds.)
- Hardcover
Anbieter: Universitätsbuchhandlung Herta Hold GmbH, Berlin, DeutschlandUniversitätsbuchhandlung Herta Hold GmbH
Verkäufer/-in kontaktierenVerkäufer/-in mit 4 SternenZustand: Gebraucht
EUR 12,00
EUR 30,00 VersandVersand von Deutschland nach USAAnzahl: 1 verfügbar
X, 233 p. Hardcover. Versand aus Deutschland / We dispatch from Germany via Air Mail. Einband bestoßen, daher Mängelexemplar gestempelt, sonst sehr guter Zustand. Imperfect copy due to slightly bumped cover, apart from this in very good condition. Stamped. Stamped. Sprache: Englisch.
- Hardcover
- Erstausgabe
Anbieter: Better World Books, Mishawaka, IN, USABetter World Books
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Gebraucht - Gut
EUR 64,53
Versand gratisVersand innerhalb von USAAnzahl: 1 verfügbar
Zustand: Very Good. 1st Edition. Former library copy. Pages intact with possible writing/highlighting. Binding strong with minor wear. Dust jackets/supplements may not be included. Includes library markings. Stock photo provided. Product includes identifying sticker. Better World Books: Buy Books. Do Good.
- Hardcover
Anbieter: Phatpocket Limited, Waltham Abbey, HERTS, Vereinigtes KönigreichPhatpocket Limited
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Gebraucht - Befriedigend
EUR 61,66
EUR 12,44 VersandVersand von Vereinigtes Königreich nach USAAnzahl: 1 verfügbar
Zustand: Good. Your purchase helps support Sri Lankan Children's Charity 'The Rainbow Centre'. Ex-library, so some stamps and wear, but in good overall condition. Our donations to The Rainbow Centre have helped provide an education and a safe haven to hundreds of children who live in appalling conditions.
- Hardcover
Anbieter: Chiron Media, Wallingford, Vereinigtes KönigreichChiron Media
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 64,79
EUR 18,11 VersandVersand von Vereinigtes Königreich nach USAAnzahl: Mehr als 20 verfügbar
Hardcover. Zustand: New.
- Hardcover
Anbieter: GoldBooks, Denver, CO, USAGoldBooks
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 106,75
EUR 4,75 VersandVersand innerhalb von USAAnzahl: 1 verfügbar
Hardcover. Zustand: new. New Copy. Customer Service Guaranteed.
- Hardcover
Anbieter: Buchpark, Trebbin, DeutschlandBuchpark
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Gebraucht - Sehr gut
EUR 12,72
EUR 105,00 VersandVersand von Deutschland nach USAAnzahl: 1 verfügbar
Zustand: Sehr gut. Zustand: Sehr gut | Sprache: Englisch | Produktart: Bücher | Design of Systems on a Chip: Design&Test is the second of two volumes addressing the design challenges associated with new generations of the semiconductor technology. The various chapters are the compilations of tutorials presented at workshops in t…he recent years by prominent authors from all over the world. Technology, productivity and quality are the main aspects under consideration to establish the major requirements for the design and test of upcoming systems on a chip. In particular this second book include contributions on three different, but complementary axes: core design, computer-aided design tools and test methods. A collection of chapters deal with the heterogeneity aspect of core designs, showing the diversity of parts that may share the same substrate in a state-of-the-art system on a chip. The second part of the book discusses CAD in three different levels of design abstraction, from system level to physical design. The third part deals with test methods. The topic is addressed from different viewpoints: in terms of chip complexity, test is discussed from the core and system prospective; in terms of signal heterogeneity, the digital, mixed-signal and microsystem prospective are considered. Fault-tolerance in integrated circuits is not an exclusive concern regarding space designers or highly-reliable application engineers. Rather, designers of next generation products must cope with reduced margin noises due to technological advances. The continuous evolution of the fabrication technology process of semiconductor components, in terms of transistor geometry shrinking, power supply, speed, and logic density, has significantly reduced the reliability of very deep submicron integrated circuits, in face of the various internal and external sources of noise. The very popular Field Programmable Gate Arrays, customizable by SRAM cells, are a consequence of the integrated circuit evolution with millions of memory cells to implement the logic, embedded memories, routing, and more recently with embedded microprocessors cores. These re-programmable systems-on-chip platforms must be fault-tolerant to cope with present days requirements. This book discusses fault-tolerance techniques for SRAM-based Field Programmable Gate Arrays (FPGAs). It starts by showing the model of the problem and the upset effects in the programmable architecture. In the sequence, it shows the main fault tolerance techniques used nowadays to protect integrated circuits against errors. A large set of methods for designing fault tolerance systems in SRAM-based FPGAs is described. Some presented techniques are based on developing a new fault-tolerant architecture with new robustness FPGA elements. Other techniques are based on protecting the high-level hardware description before the synthesis in the FPGA. The reader has the flexibility of choosing the most suitable fault-tolerance technique for its project and to compare a set of fault toleranttechniques for programmable logic applications.
- Softcover
Anbieter: Basi6 International, Irving, TX, USABasi6 International
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 136,13
Versand gratisVersand innerhalb von USAAnzahl: 10 verfügbar
Zustand: Brand New. New. Delivery takes 25-30 days. Excellent Customer Service.
- Hardcover
Anbieter: Basi6 International, Irving, TX, USABasi6 International
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 136,13
Versand gratisVersand innerhalb von USAAnzahl: 10 verfügbar
Zustand: Brand New. New. Delivery takes 25-30 days. Excellent Customer Service.
- Softcover
Anbieter: Ria Christie Collections, Uxbridge, Vereinigtes KönigreichRia Christie Collections
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 141,35
EUR 14,01 VersandVersand von Vereinigtes Königreich nach USAAnzahl: Mehr als 20 verfügbar
Zustand: New. In.
- Hardcover
Anbieter: Ria Christie Collections, Uxbridge, Vereinigtes KönigreichRia Christie Collections
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 166,02
EUR 14,01 VersandVersand von Vereinigtes Königreich nach USAAnzahl: Mehr als 20 verfügbar
Zustand: New. In.
- Hardcover
Anbieter: Ria Christie Collections, Uxbridge, Vereinigtes KönigreichRia Christie Collections
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 183,30
EUR 14,01 VersandVersand von Vereinigtes Königreich nach USAAnzahl: Mehr als 20 verfügbar
Zustand: New. In.
Weitere Bilder- Softcover
Anbieter: preigu, Osnabrück, Deutschlandpreigu
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 140,10
EUR 70,00 VersandVersand von Deutschland nach USAAnzahl: 5 verfügbar
Taschenbuch. Zustand: Neu. Design of Systems on a Chip: Design and Test | Ricardo Reis (u. a.) | Taschenbuch | x | Englisch | 2010 | Springer | EAN 9781441940896 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu.
- Softcover
Anbieter: AHA-BUCH GmbH, Einbeck, DeutschlandAHA-BUCH GmbH
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 167,14
EUR 61,99 VersandVersand von Deutschland nach USAAnzahl: 1 verfügbar
Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - Design of Systems on a Chip: Design&Test is the second of two volumes addressing the design challenges associated with new generations of the semiconductor technology. The various chapters are the compilations of tutorials presented at workshops in t…he recent years by prominent authors from all over the world. Technology, productivity and quality are the main aspects under consideration to establish the major requirements for the design and test of upcoming systems on a chip. In particular this second book include contributions on three different, but complementary axes: core design, computer-aided design tools and test methods. A collection of chapters deal with the heterogeneity aspect of core designs, showing the diversity of parts that may share the same substrate in a state-of-the-art system on a chip. The second part of the book discusses CAD in three different levels of design abstraction, from system level to physical design. The third part deals with test methods. The topic is addressed from different viewpoints: in terms of chip complexity, test is discussed from the core and system prospective; in terms of signal heterogeneity, the digital, mixed-signal and microsystem prospective are considered.Fault-tolerance in integrated circuits is not an exclusive concern regarding space designers or highly-reliable application engineers. Rather, designers of next generation products must cope with reduced margin noises due to technological advances. The continuous evolution of the fabrication technology process of semiconductor components, in terms of transistor geometry shrinking, power supply, speed, and logic density, has significantly reduced the reliability of very deep submicron integrated circuits, in face of the various internal and external sources of noise. The very popular Field Programmable Gate Arrays, customizable by SRAM cells, are a consequence of the integrated circuit evolution with millions of memory cells to implement the logic, embedded memories, routing, and more recently with embedded microprocessors cores. These re-programmable systems-on-chip platforms must be fault-tolerant to cope with present days requirements. This book discusses fault-tolerance techniques for SRAM-based Field Programmable Gate Arrays (FPGAs). It starts by showing the model of the problem and the upset effects in the programmable architecture. In the sequence, it shows the main fault tolerance techniques used nowadays to protect integrated circuits against errors. A large set of methods for designing fault tolerance systems in SRAM-based FPGAs is described. Some presented techniques are based on developing a new fault-tolerant architecture with new robustness FPGA elements. Other techniques are based on protecting the high-level hardware description before the synthesis in the FPGA. The reader has the flexibility of choosing the most suitable fault-tolerance technique for its project and to compare a set of fault toleranttechniques for programmable logic applications.
- Hardcover
Anbieter: AHA-BUCH GmbH, Einbeck, DeutschlandAHA-BUCH GmbH
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 168,73
EUR 62,68 VersandVersand von Deutschland nach USAAnzahl: 1 verfügbar
Buch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - Design of Systems on a Chip: Design&Test is the second of two volumes addressing the design challenges associated with new generations of the semiconductor technology. The various chapters are the compilations of tutorials presented at workshops in the rece…nt years by prominent authors from all over the world. Technology, productivity and quality are the main aspects under consideration to establish the major requirements for the design and test of upcoming systems on a chip. In particular this second book include contributions on three different, but complementary axes: core design, computer-aided design tools and test methods. A collection of chapters deal with the heterogeneity aspect of core designs, showing the diversity of parts that may share the same substrate in a state-of-the-art system on a chip. The second part of the book discusses CAD in three different levels of design abstraction, from system level to physical design. The third part deals with test methods. The topic is addressed from different viewpoints: in terms of chip complexity, test is discussed from the core and system prospective; in terms of signal heterogeneity, the digital, mixed-signal and microsystem prospective are considered.Fault-tolerance in integrated circuits is not an exclusive concern regarding space designers or highly-reliable application engineers. Rather, designers of next generation products must cope with reduced margin noises due to technological advances. The continuous evolution of the fabrication technology process of semiconductor components, in terms of transistor geometry shrinking, power supply, speed, and logic density, has significantly reduced the reliability of very deep submicron integrated circuits, in face of the various internal and external sources of noise. The very popular Field Programmable Gate Arrays, customizable by SRAM cells, are a consequence of the integrated circuit evolution with millions of memory cells to implement the logic, embedded memories, routing, and more recently with embedded microprocessors cores. These re-programmable systems-on-chip platforms must be fault-tolerant to cope with present days requirements. This book discusses fault-tolerance techniques for SRAM-based Field Programmable Gate Arrays (FPGAs). It starts by showing the model of the problem and the upset effects in the programmable architecture. In the sequence, it shows the main fault tolerance techniques used nowadays to protect integrated circuits against errors. A large set of methods for designing fault tolerance systems in SRAM-based FPGAs is described. Some presented techniques are based on developing a new fault-tolerant architecture with new robustness FPGA elements. Other techniques are based on protecting the high-level hardware description before the synthesis in the FPGA. The reader has the flexibility of choosing the most suitable fault-tolerance technique for its project and to compare a set of fault toleranttechniques for programmable logic applications.
Design of Systems on a Chip: Design and Test
Reis, Ricardo (Editor) / Soares Lubaszewski, Marcelo (Editor) / Jess, Jochen A.G. (Editor)
- Softcover
Anbieter: Revaluation Books, Exeter, Vereinigtes KönigreichRevaluation Books
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 232,48
EUR 11,69 VersandVersand von Vereinigtes Königreich nach USAAnzahl: 2 verfügbar
Paperback. Zustand: Brand New. 297 pages. 9.00x6.00x0.55 inches. In Stock.
- Hardcover
- Internationale Ausgabe
Anbieter: UK BOOKS STORE, London, LONDO, Vereinigtes KönigreichUK BOOKS STORE
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenInternationale AusgabeZustand: Neu
EUR 247,84
Versand gratisVersand von Vereinigtes Königreich nach USAAnzahl: 1 verfügbar
Zustand: New. Brand New! Fast Delivery This is an International Edition and ship within 24-48 hours. Deliver by FedEx and Dhl, & Aramex, UPS, & USPS and we do accept APO and PO BOX Addresses. Order can be delivered worldwide within 6-10 days and we do have flat rate for up to 2LB. Extra shipping charges will be requested if the…Book weight is more than 5 LB. This Item May be shipped from India, United states & United Kingdom. Depending on your location and availability.
- Softcover
Anbieter: Mispah books, Redhill, SURRE, Vereinigtes KönigreichMispah books
Verkäufer/-in kontaktierenVerkäufer/-in mit 4 SternenZustand: Gebraucht - Wie neu
EUR 258,94
EUR 29,23 VersandVersand von Vereinigtes Königreich nach USAAnzahl: 1 verfügbar
Paperback. Zustand: Like New. LIKE NEW. SHIPS FROM MULTIPLE LOCATIONS. book.
- Hardcover
Anbieter: Mispah books, Redhill, SURRE, Vereinigtes KönigreichMispah books
Verkäufer/-in kontaktierenVerkäufer/-in mit 4 SternenZustand: Gebraucht - Wie neu
EUR 286,64
EUR 29,23 VersandVersand von Vereinigtes Königreich nach USAAnzahl: 1 verfügbar
Hardcover. Zustand: Like New. LIKE NEW. SHIPS FROM MULTIPLE LOCATIONS. book.
- Hardcover
Anbieter: Mispah books, Redhill, SURRE, Vereinigtes KönigreichMispah books
Verkäufer/-in kontaktierenVerkäufer/-in mit 4 SternenZustand: Gebraucht - Wie neu
EUR 435,99
EUR 29,23 VersandVersand von Vereinigtes Königreich nach USAAnzahl: 1 verfügbar
Hardcover. Zustand: Like New. LIKE NEW. SHIPS FROM MULTIPLE LOCATIONS. book.
- Softcover
- Print-on-Demand
Anbieter: Brook Bookstore On Demand, Napoli, NA, ItalienBrook Bookstore On Demand
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 126,26
EUR 5,50 VersandVersand von Italien nach USAAnzahl: Mehr als 20 verfügbar
Zustand: new. Questo è un articolo print on demand.
- Hardcover
- Print-on-Demand
Anbieter: Brook Bookstore On Demand, Napoli, NA, ItalienBrook Bookstore On Demand
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 126,26
EUR 11,00 VersandVersand von Italien nach USAAnzahl: Mehr als 20 verfügbar
Zustand: new. Questo è un articolo print on demand.
- Softcover
- Print-on-Demand
Anbieter: THE SAINT BOOKSTORE, Southport, Vereinigtes KönigreichTHE SAINT BOOKSTORE
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 167,54
EUR 18,70 VersandVersand von Vereinigtes Königreich nach USAAnzahl: Mehr als 20 verfügbar
Paperback / softback. Zustand: New. This item is printed on demand. New copy - Usually dispatched within 5-9 working days.
- Softcover
- Print-on-Demand
Anbieter: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, DeutschlandBuchWeltWeit Ludwig Meier e.K.
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 160,49
EUR 23,00 VersandVersand von Deutschland nach USAAnzahl: 2 verfügbar
Taschenbuch. Zustand: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book is the second of two volumes addressing the design challenges associated with new generations of semiconductor technology. The various chapters are compiled from tutorials presented at workshops in recent years by prominent…authors from all over the world. Technology, productivity and quality are the main aspects under consideration to establish the major requirements for the design and test of upcoming systems on a chip. 244 pp. Englisch.
- Hardcover
- Print-on-Demand
Anbieter: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, DeutschlandBuchWeltWeit Ludwig Meier e.K.
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 160,49
EUR 23,00 VersandVersand von Deutschland nach USAAnzahl: 2 verfügbar
Buch. Zustand: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book is the second of two volumes addressing the design challenges associated with new generations of semiconductor technology. The various chapters are compiled from tutorials presented at workshops in recent years by prominent authors… from all over the world. Technology, productivity and quality are the main aspects under consideration to establish the major requirements for the design and test of upcoming systems on a chip. 244 pp. Englisch.
- Hardcover
- Print-on-Demand
Anbieter: moluna, Greven, Deutschlandmoluna
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 136,16
EUR 48,99 VersandVersand von Deutschland nach USAAnzahl: Mehr als 20 verfügbar
Gebunden. Zustand: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. A practical and academic overview of Systems-on-ChipDesign and test aspects are high lightedRicardo Reis is a former president of the Brazilian Computer Society and former vice-president of the Brazilian Micro…electronics Society. He is .
- Softcover
- Print-on-Demand
Anbieter: moluna, Greven, Deutschlandmoluna
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 136,16
EUR 48,99 VersandVersand von Deutschland nach USAAnzahl: Mehr als 20 verfügbar
Zustand: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. A practical and academic overview of Systems-on-ChipDesign and test aspects are high lightedRicardo Reis is a former president of the Brazilian Computer Society and former vice-president of the Brazilian Microelectronic…s Society. He is .
- Hardcover
- Print-on-Demand
Anbieter: PBShop.store UK, Fairford, GLOS, Vereinigtes KönigreichPBShop.store UK
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 186,50
EUR 10,94 VersandVersand von Vereinigtes Königreich nach USAAnzahl: Mehr als 20 verfügbar
HRD. Zustand: New. New Book. Delivered from our UK warehouse in 4 to 14 business days. THIS BOOK IS PRINTED ON DEMAND. Established seller since 2000.
- Hardcover
- Print-on-Demand
Anbieter: PBShop.store US, Wood Dale, IL, USAPBShop.store US
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 198,17
Versand gratisVersand innerhalb von USAAnzahl: Mehr als 20 verfügbar
HRD. Zustand: New. New Book. Shipped from UK. THIS BOOK IS PRINTED ON DEMAND. Established seller since 2000.
- Softcover
- Print-on-Demand
Anbieter: buchversandmimpf2000, Emtmannsberg, BAYE, Deutschlandbuchversandmimpf2000
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 160,49
EUR 60,00 VersandVersand von Deutschland nach USAAnzahl: 1 verfügbar
Taschenbuch. Zustand: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Design of Systems on a Chip: Design&Test is the second of two volumes addressing the design challenges associated with new generations of the semiconductor technology. The various chapters are the compilations of tutorials presented at wo…rkshops in the recent years by prominent authors from all over the world. Technology, productivity and quality are the main aspects under consideration to establish the major requirements for the design and test of upcoming systems on a chip. In particular this second book include contributions on three different, but complementary axes: core design, computer-aided design tools and test methods. A collection of chapters deal with the heterogeneity aspect of core designs, showing the diversity of parts that may share the same substrate in a state-of-the-art system on a chip. The second part of the book discusses CAD in three different levels of design abstraction, from system level to physical design. The third part deals with test methods. The topic is addressed from different viewpoints: in terms of chip complexity, test is discussed from the core and system prospective; in terms of signal heterogeneity, the digital, mixed-signal and microsystem prospective are considered.Fault-tolerance in integrated circuits is not an exclusive concern regarding space designers or highly-reliable application engineers. Rather, designers of next generation products must cope with reduced margin noises due to technological advances. The continuous evolution of the fabrication technology process of semiconductor components, in terms of transistor geometry shrinking, power supply, speed, and logic density, has significantly reduced the reliability of very deep submicron integrated circuits, in face of the various internal and external sources of noise. The very popular Field Programmable Gate Arrays, customizable by SRAM cells, are a consequence of the integrated circuit evolution with millions of memory cells to implement the logic, embedded memories, routing, and more recently with embedded microprocessors cores. These re-programmable systems-on-chip platforms must be fault-tolerant to cope with present days requirements. This book discusses fault-tolerance techniques for SRAM-based Field Programmable Gate Arrays (FPGAs). It starts by showing the model of the problem and the upset effects in the programmable architecture. In the sequence, it shows the main fault tolerance techniques used nowadays to protect integrated circuits against errors. A large set of methods for designing fault tolerance systems in SRAM-based FPGAs is described. Some presented techniques are based on developing a new fault-tolerant architecture with new robustness FPGA elements. Other techniques are based on protecting the high-level hardware description before the synthesis in the FPGA. The reader has the flexibility of choosing the most suitable fault-tolerance technique for its project and to compare a set of fault toleranttechniques for programmable logic applications.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 244 pp. Englisch.
- Hardcover
- Print-on-Demand
Anbieter: buchversandmimpf2000, Emtmannsberg, BAYE, Deutschlandbuchversandmimpf2000
Verkäufer/-in kontaktierenVerkäufer/-in mit 5 SternenZustand: Neu
EUR 160,49
EUR 60,00 VersandVersand von Deutschland nach USAAnzahl: 1 verfügbar
Buch. Zustand: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Design of Systems on a Chip: Design&Test is the second of two volumes addressing the design challenges associated with new generations of the semiconductor technology. The various chapters are the compilations of tutorials presented at workshops… in the recent years by prominent authors from all over the world. Technology, productivity and quality are the main aspects under consideration to establish the major requirements for the design and test of upcoming systems on a chip. In particular this second book include contributions on three different, but complementary axes: core design, computer-aided design tools and test methods. A collection of chapters deal with the heterogeneity aspect of core designs, showing the diversity of parts that may share the same substrate in a state-of-the-art system on a chip. The second part of the book discusses CAD in three different levels of design abstraction, from system level to physical design. The third part deals with test methods. The topic is addressed from different viewpoints: in terms of chip complexity, test is discussed from the core and system prospective; in terms of signal heterogeneity, the digital, mixed-signal and microsystem prospective are considered.Fault-tolerance in integrated circuits is not an exclusive concern regarding space designers or highly-reliable application engineers. Rather, designers of next generation products must cope with reduced margin noises due to technological advances. The continuous evolution of the fabrication technology process of semiconductor components, in terms of transistor geometry shrinking, power supply, speed, and logic density, has significantly reduced the reliability of very deep submicron integrated circuits, in face of the various internal and external sources of noise. The very popular Field Programmable Gate Arrays, customizable by SRAM cells, are a consequence of the integrated circuit evolution with millions of memory cells to implement the logic, embedded memories, routing, and more recently with embedded microprocessors cores. These re-programmable systems-on-chip platforms must be fault-tolerant to cope with present days requirements. This book discusses fault-tolerance techniques for SRAM-based Field Programmable Gate Arrays (FPGAs). It starts by showing the model of the problem and the upset effects in the programmable architecture. In the sequence, it shows the main fault tolerance techniques used nowadays to protect integrated circuits against errors. A large set of methods for designing fault tolerance systems in SRAM-based FPGAs is described. Some presented techniques are based on developing a new fault-tolerant architecture with new robustness FPGA elements. Other techniques are based on protecting the high-level hardware description before the synthesis in the FPGA. The reader has the flexibility of choosing the most suitable fault-tolerance technique for its project and to compare a set of fault toleranttechniques for programmable logic applications.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 244 pp. Englisch.
