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In den WarenkorbHardcover. Zustand: new. Hardcover. The rapid evolution and explosive growth of integrated circuit technology have had a profound effect on society. Integrated circuits (ICs) are used universally and the expanding use of IC technology requires more accurate circuit analysis methods and tools, prompting the introduction of computers into the design process. The goal of this book is to build a firm foundation in the use of computer-assisted techniques for IC device and process design. Both practical and analytical viewpoints are stressed to give the reader the background necessary to appreciate CAD tools and to feel comfortable with their use. This work presents a discourse on process and device CAD as interrelated subjects, building on a wide range of experiences and applications of the SUPREM program. Chapter 1 focuses on the motivation for coupled process and device CAD. In Chapter 2 SUPREM III is introduced, and process CAD is discussed in terms of ion-implantation, impurity diffusion, and oxidation models. Chapter 3 introduces the Stanford device analysis program SEDAN III (SEmiconductor Device ANalysis).The next three chapters move into greater detail concerning device operating principles and analysis techniques. Chapter 4 reviews the classical formulation of pn junction theory and uses device analysis (SEDAN) both to evaluate some of the classical assumptions and to investigate the difficult problem of high level injection. Chapter 5 returns to MOS devices, reviews the first-order MOS theory, and introduces some important second-order effects. Chapter 6 considers the bipolar transistor. Chapter 7 considers the application of process simulation and device analysis to technology design. The BiCMOS process is selected as a useful design vehicle for two reasons. Firstly, it allows the reader to pull together concepts from the entire book and secondly, the inherent nature of BiCMOS technology offers real constraints and hence trade-offs which must be understood and accounted for. 208 5.4 Threshold Voltage in Nonuniform Substrate 217 5.5 MOS Device Design by Simulation . 224 5.5.1 Body-bias Sensitivity of Threshold Voltage 225 5.5.2 Two-region Model . 242 6 Bipolar Transistors 243 6.1 Introduction . 243 6.2 Lateral pnp Transistor Operation 245 6.3 Transport Current Analysis . Shipping may be from multiple locations in the US or from the UK, depending on stock availability.
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In den WarenkorbPaperback. Zustand: new. Paperback. 129 3.6 Exercises 130 3.7 References. 131 4 PN Junctions 131 4.1 Introduction. 132 4.2 Carrier Densities: Equilibrium Case 4.3 Non-Equilibrium . . 139 4.4 Carrier Transport and Conservation 144 4.5 The pn Junction - Equilibrium Conditions. 147 155 4.6 The pn Junction - Non-equilibrium. 4.7 SEDAN Analysis . . . . . . . . . . . . . 166 4.7.1 Heavy Doping Effects . . 176 4.7.2 Analysis of High-Level Injection 181 190 4.7.3 Technology-Dependent Device Effects 4.8 Summary 193 4.9 Exercises 193 194 4.10 References. 5 MOS Structures 197 5.1 Introduction . . 197 5.2 The MOS Capacitor . . 198 5.3 Basic MOSFET I-V Characteristics. 208 5.4 Threshold Voltage in Nonuniform Substrate 217 5.5 MOS Device Design by Simulation . . . . . 224 5.5.1 Body-bias Sensitivity of Threshold Voltage 225 5.5.2 Two-region Model . . . . . . . . 231 5.5.3 MOSFET Design by Simulation. 234 5.6 Summary 240 5.7 Exercises 240 5.8 References. 242 6 Bipolar Transistors 243 6.1 Introduction . 243 6.2 Lateral pnp Transistor Operation 245 6.3 Transport Current Analysis . 252 6.4 Generalized Charge Storage Model 260 6.,1) Transistor Equivalent Circuits. 267 6.5.1 Charge Control Model . 208 5.4 Threshold Voltage in Nonuniform Substrate 217 5.5 MOS Device Design by Simulation . 224 5.5.1 Body-bias Sensitivity of Threshold Voltage 225 5.5.2 Two-region Model . 242 6 Bipolar Transistors 243 6.1 Introduction . 243 6.2 Lateral pnp Transistor Operation 245 6.3 Transport Current Analysis . Shipping may be from multiple locations in the US or from the UK, depending on stock availability.
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In den WarenkorbZustand: New. pp. 396.
Verlag: Springer US, Springer New York, 1993
ISBN 10: 0792393791 ISBN 13: 9780792393795
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In den WarenkorbBuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - 129 3.6 Exercises 130 3.7 References. 131 4 PN Junctions 131 4.1 Introduction. 132 4.2 Carrier Densities: Equilibrium Case 4.3 Non-Equilibrium . . 139 4.4 Carrier Transport and Conservation 144 4.5 The pn Junction - Equilibrium Conditions. 147 155 4.6 The pn Junction - Non-equilibrium. 4.7 SEDAN Analysis . . . . . . . . . . . . . 166 4.7.1 Heavy Doping Effects . . 176 4.7.2 Analysis of High-Level Injection 181 190 4.7.3 Technology-Dependent Device Effects 4.8 Summary 193 4.9 Exercises 193 194 4.10 References. 5 MOS Structures 197 5.1 Introduction . . 197 5.2 The MOS Capacitor . . 198 5.3 Basic MOSFET I-V Characteristics. 208 5.4 Threshold Voltage in Nonuniform Substrate 217 5.5 MOS Device Design by Simulation . . . . . 224 5.5.1 Body-bias Sensitivity of Threshold Voltage 225 5.5.2 Two-region Model . . . . . . . . 231 5.5.3 MOSFET Design by Simulation. 234 5.6 Summary 240 5.7 Exercises 240 5.8 References. 242 6 Bipolar Transistors 243 6.1 Introduction . 243 6.2 Lateral pnp Transistor Operation 245 6.3 Transport Current Analysis . 252 6.4 Generalized Charge Storage Model 260 6.,1) Transistor Equivalent Circuits. 267 6.5.1 Charge Control Model .
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In den WarenkorbPaperback. Zustand: new. Paperback. 129 3.6 Exercises 130 3.7 References. 131 4 PN Junctions 131 4.1 Introduction. 132 4.2 Carrier Densities: Equilibrium Case 4.3 Non-Equilibrium . . 139 4.4 Carrier Transport and Conservation 144 4.5 The pn Junction - Equilibrium Conditions. 147 155 4.6 The pn Junction - Non-equilibrium. 4.7 SEDAN Analysis . . . . . . . . . . . . . 166 4.7.1 Heavy Doping Effects . . 176 4.7.2 Analysis of High-Level Injection 181 190 4.7.3 Technology-Dependent Device Effects 4.8 Summary 193 4.9 Exercises 193 194 4.10 References. 5 MOS Structures 197 5.1 Introduction . . 197 5.2 The MOS Capacitor . . 198 5.3 Basic MOSFET I-V Characteristics. 208 5.4 Threshold Voltage in Nonuniform Substrate 217 5.5 MOS Device Design by Simulation . . . . . 224 5.5.1 Body-bias Sensitivity of Threshold Voltage 225 5.5.2 Two-region Model . . . . . . . . 231 5.5.3 MOSFET Design by Simulation. 234 5.6 Summary 240 5.7 Exercises 240 5.8 References. 242 6 Bipolar Transistors 243 6.1 Introduction . 243 6.2 Lateral pnp Transistor Operation 245 6.3 Transport Current Analysis . 252 6.4 Generalized Charge Storage Model 260 6.,1) Transistor Equivalent Circuits. 267 6.5.1 Charge Control Model . 208 5.4 Threshold Voltage in Nonuniform Substrate 217 5.5 MOS Device Design by Simulation . 224 5.5.1 Body-bias Sensitivity of Threshold Voltage 225 5.5.2 Two-region Model . 242 6 Bipolar Transistors 243 6.1 Introduction . 243 6.2 Lateral pnp Transistor Operation 245 6.3 Transport Current Analysis . Shipping may be from our Sydney, NSW warehouse or from our UK or US warehouse, depending on stock availability.
Verlag: Kluwer Academic Publishers, Dordrecht, 1993
ISBN 10: 0792393791 ISBN 13: 9780792393795
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In den WarenkorbHardcover. Zustand: new. Hardcover. The rapid evolution and explosive growth of integrated circuit technology have had a profound effect on society. Integrated circuits (ICs) are used universally and the expanding use of IC technology requires more accurate circuit analysis methods and tools, prompting the introduction of computers into the design process. The goal of this book is to build a firm foundation in the use of computer-assisted techniques for IC device and process design. Both practical and analytical viewpoints are stressed to give the reader the background necessary to appreciate CAD tools and to feel comfortable with their use. This work presents a discourse on process and device CAD as interrelated subjects, building on a wide range of experiences and applications of the SUPREM program. Chapter 1 focuses on the motivation for coupled process and device CAD. In Chapter 2 SUPREM III is introduced, and process CAD is discussed in terms of ion-implantation, impurity diffusion, and oxidation models. Chapter 3 introduces the Stanford device analysis program SEDAN III (SEmiconductor Device ANalysis).The next three chapters move into greater detail concerning device operating principles and analysis techniques. Chapter 4 reviews the classical formulation of pn junction theory and uses device analysis (SEDAN) both to evaluate some of the classical assumptions and to investigate the difficult problem of high level injection. Chapter 5 returns to MOS devices, reviews the first-order MOS theory, and introduces some important second-order effects. Chapter 6 considers the bipolar transistor. Chapter 7 considers the application of process simulation and device analysis to technology design. The BiCMOS process is selected as a useful design vehicle for two reasons. Firstly, it allows the reader to pull together concepts from the entire book and secondly, the inherent nature of BiCMOS technology offers real constraints and hence trade-offs which must be understood and accounted for. 208 5.4 Threshold Voltage in Nonuniform Substrate 217 5.5 MOS Device Design by Simulation . 224 5.5.1 Body-bias Sensitivity of Threshold Voltage 225 5.5.2 Two-region Model . 242 6 Bipolar Transistors 243 6.1 Introduction . 243 6.2 Lateral pnp Transistor Operation 245 6.3 Transport Current Analysis . Shipping may be from our Sydney, NSW warehouse or from our UK or US warehouse, depending on stock availability.
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In den WarenkorbZustand: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. 129 3.6 Exercises 130 3.7 References. 131 4 PN Junctions 131 4.1 Introduction. 132 4.2 Carrier Densities: Equilibrium Case 4.3 Non-Equilibrium . . 139 4.4 Carrier Transport and Conservation 144 4.5 The pn Junction - Equilibrium Conditions. 147 155 .
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In den WarenkorbGebunden. Zustand: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. 129 3.6 Exercises 130 3.7 References. 131 4 PN Junctions 131 4.1 Introduction. 132 4.2 Carrier Densities: Equilibrium Case 4.3 Non-Equilibrium . . 139 4.4 Carrier Transport and Conservation 144 4.5 The pn Junction - Equilibrium Conditions. 147 155 .
Verlag: Springer US, Springer New York Jul 1993, 1993
ISBN 10: 0792393791 ISBN 13: 9780792393795
Sprache: Englisch
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In den WarenkorbBuch. Zustand: Neu. This item is printed on demand - Print on Demand Titel. Neuware -129 3.6 Exercises 130 3.7 References. 131 4 PN Junctions 131 4.1 Introduction. 132 4.2 Carrier Densities: Equilibrium Case 4.3 Non-Equilibrium . . 139 4.4 Carrier Transport and Conservation 144 4.5 The pn Junction - Equilibrium Conditions. 147 155 4.6 The pn Junction - Non-equilibrium. 4.7 SEDAN Analysis . . . . . . . . . . . . . 166 4.7.1 Heavy Doping Effects . . 176 4.7.2 Analysis of High-Level Injection 181 190 4.7.3 Technology-Dependent Device Effects 4.8 Summary 193 4.9 Exercises 193 194 4.10 References. 5 MOS Structures 197 5.1 Introduction . . 197 5.2 The MOS Capacitor . . 198 5.3 Basic MOSFET I-V Characteristics. 208 5.4 Threshold Voltage in Nonuniform Substrate 217 5.5 MOS Device Design by Simulation . . . . . 224 5.5.1 Body-bias Sensitivity of Threshold Voltage 225 5.5.2 Two-region Model . . . . . . . . 231 5.5.3 MOSFET Design by Simulation. 234 5.6 Summary 240 5.7 Exercises 240 5.8 References. 242 6 Bipolar Transistors 243 6.1 Introduction . 243 6.2 Lateral pnp Transistor Operation 245 6.3 Transport Current Analysis . 252 6.4 Generalized Charge Storage Model 260 6.,1) Transistor Equivalent Circuits. 267 6.5.1 Charge Control Model .Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 396 pp. Englisch.
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