Verwandte Artikel zu Defect and Fault Tolerance in Vlsi Systems: Volume...
Defect and Fault Tolerance in Vlsi Systems: Volume 1 (Defect and Fault Tolerance in VLSI Systems: International Workshop Proceedings) - Hardcover
Inhaltsangabe
This book contains an edited selection of papers presented at the International Workshop on Defect and Fault Tolerance in VLSI Systems held October 6-7, 1988 in Springfield, Massachusetts. Our thanks go to all the contributors and especially the members of the program committee for the difficult and time-consuming work involved in selecting the papers that were presented in the workshop and reviewing the papers included in this book. Thanks are also due to the IEEE Computer Society (in particular, the Technical Committee on Fault-Tolerant Computing and the Technical Committee on VLSI) and the University of Massachusetts at Amherst for sponsoring the workshop, and to the National Science Foundation for supporting (under grant number MIP-8803418) the keynote address and the distribution of this book to all workshop attendees. The objective of the workshop was to bring t. ogether researchers and practition- ers from both industry and academia in the field of defect tolerance and yield en- ha. ncement in VLSI to discuss their mutual interests in defect-tolerant architectures and models for integrated circuit defects, faults, and yield. Progress in this area was slowed down by the proprietary nature of yield-related data, and by the lack of appropriate forums for disseminating such information. The goal of this workshop was therefore to provide a forum for a dialogue and exchange of views. A follow-up workshop in October 1989, with C. H. Stapper from IBM and V. K. Jain from the University of South Florida as general co-chairmen, is being organized.
Die Inhaltsangabe kann sich auf eine andere Ausgabe dieses Titels beziehen.
Reseña del editor
This book contains an edited selection of papers presented at the International Workshop on Defect and Fault Tolerance in VLSI Systems held October 6-7, 1988 in Springfield, Massachusetts. Our thanks go to all the contributors and especially the members of the program committee for the difficult and time-consuming work involved in selecting the papers that were presented in the workshop and reviewing the papers included in this book. Thanks are also due to the IEEE Computer Society (in particular, the Technical Committee on Fault-Tolerant Computing and the Technical Committee on VLSI) and the University of Massachusetts at Amherst for sponsoring the workshop, and to the National Science Foundation for supporting (under grant number MIP-8803418) the keynote address and the distribution of this book to all workshop attendees. The objective of the workshop was to bring t. ogether researchers and practition ers from both industry and academia in the field of defect tolerance and yield en ha. ncement in VLSI to discuss their mutual interests in defect-tolerant architectures and models for integrated circuit defects, faults, and yield. Progress in this area was slowed down by the proprietary nature of yield-related data, and by the lack of appropriate forums for disseminating such information. The goal of this workshop was therefore to provide a forum for a dialogue and exchange of views. A follow-up workshop in October 1989, with C. H. Stapper from IBM and V. K. Jain from the University of South Florida as general co-chairmen, is being organized.
Reseña del editor
Contains a selection of papers presented at an international workshop on [title] held Oct. 1988 in Springfield, Mass. Here, both researchers and practitioners in the field discuss their mutual interests in defect-tolerant architectures and models for integrated circuit defects, faults, and yield. An
„Über diesen Titel“ kann sich auf eine andere Ausgabe dieses Titels beziehen.
- VerlagKluwer Academic / Plenum Publishers
- Erscheinungsdatum1989
- ISBN 10 0306432242
- ISBN 13 9780306432248
- EinbandTapa dura
- SpracheEnglisch
- Anzahl der Seiten374
- Kontakt zum HerstellerNicht verfügbar
Gebraucht kaufen
Zustand: AusreichendSome wear. Satisfaction 100% guaranteed
Diesen Artikel anzeigen
EUR 39,96
EUR 21,64 für den Versand von USA nach Deutschland
Versandziele, Kosten & DauerNeu kaufen
Diesen Artikel anzeigen
EUR 53,73
EUR 2,30 für den Versand innerhalb von/der Deutschland
Versandziele, Kosten & DauerWeitere beliebte Ausgaben desselben Titels
Suchergebnisse für Defect and Fault Tolerance in Vlsi Systems: Volume...
Beispielbild für diese ISBN
Defect and Fault Tolerance in VLSI Systems
Anbieter: Biblios, Frankfurt am main, HESSE, Deutschland
Verkäuferbewertung 5 von 5 Sternen
Zustand: New. pp. 378. Bestandsnummer des Verkäufers 1898190456
Anzahl: 1 verfügbar
Beispielbild für diese ISBN
Defect and Fault Tolerance in VLSI Systems
Anbieter: Books Puddle, New York, NY, USA
Verkäuferbewertung 4 von 5 Sternen
Zustand: New. pp. 378. Bestandsnummer des Verkäufers 2698190450
Anzahl: 1 verfügbar
Beispielbild für diese ISBN
Defect and Fault Tolerance in VLSI Systems
Anbieter: Majestic Books, Hounslow, Vereinigtes Königreich
Verkäuferbewertung 5 von 5 Sternen
Zustand: New. pp. 378 Illus. Bestandsnummer des Verkäufers 95288237
Anzahl: 1 verfügbar
Beispielbild für diese ISBN
Defect and Fault Tolerance in VLSI Systems, Volume 1
Anbieter: Bookmans, Tucson, AZ, USA
Verkäuferbewertung 5 von 5 Sternen
Hardcover. Zustand: Acceptable. Some wear. Satisfaction 100% guaranteed. Bestandsnummer des Verkäufers mon0001693094
Anzahl: 1 verfügbar
Beispielbild für diese ISBN
Defect and Fault Tolerance in VLSI Systems, Volume 1
Anbieter: HPB-Red, Dallas, TX, USA
Verkäuferbewertung 5 von 5 Sternen
hardcover. Zustand: Good. Connecting readers with great books since 1972! Used textbooks may not include companion materials such as access codes, etc. May have some wear or writing/highlighting. We ship orders daily and Customer Service is our top priority! Bestandsnummer des Verkäufers S_348249697
Anzahl: 1 verfügbar