Verwandte Artikel zu Defect and Fault Tolerance in VLSI Systems: Volume...
Inhaltsangabe
This book contains an edited selection of papers presented at the International Workshop on Defect and Fault Tolerance in VLSI Systems held October 6-7, 1988 in Springfield, Massachusetts. Our thanks go to all the contributors and especially the members of the program committee for the difficult and time-consuming work involved in selecting the papers that were presented in the workshop and reviewing the papers included in this book. Thanks are also due to the IEEE Computer Society (in particular, the Technical Committee on Fault-Tolerant Computing and the Technical Committee on VLSI) and the University of Massachusetts at Amherst for sponsoring the workshop, and to the National Science Foundation for supporting (under grant number MIP-8803418) the keynote address and the distribution of this book to all workshop attendees. The objective of the workshop was to bring t. ogether researchers and practition ers from both industry and academia in the field of defect tolerance and yield en ha. ncement in VLSI to discuss their mutual interests in defect-tolerant architectures and models for integrated circuit defects, faults, and yield. Progress in this area was slowed down by the proprietary nature of yield-related data, and by the lack of appropriate forums for disseminating such information. The goal of this workshop was therefore to provide a forum for a dialogue and exchange of views. A follow-up workshop in October 1989, with C. H. Stapper from IBM and V. K. Jain from the University of South Florida as general co-chairmen, is being organized.
Die Inhaltsangabe kann sich auf eine andere Ausgabe dieses Titels beziehen.
Reseña del editor
This book contains an edited selection of papers presented at the International Workshop on Defect and Fault Tolerance in VLSI Systems held October 6-7, 1988 in Springfield, Massachusetts. Our thanks go to all the contributors and especially the members of the program committee for the difficult and time-consuming work involved in selecting the papers that were presented in the workshop and reviewing the papers included in this book. Thanks are also due to the IEEE Computer Society (in particular, the Technical Committee on Fault-Tolerant Computing and the Technical Committee on VLSI) and the University of Massachusetts at Amherst for sponsoring the workshop, and to the National Science Foundation for supporting (under grant number MIP-8803418) the keynote address and the distribution of this book to all workshop attendees. The objective of the workshop was to bring t. ogether researchers and practition ers from both industry and academia in the field of defect tolerance and yield en ha. ncement in VLSI to discuss their mutual interests in defect-tolerant architectures and models for integrated circuit defects, faults, and yield. Progress in this area was slowed down by the proprietary nature of yield-related data, and by the lack of appropriate forums for disseminating such information. The goal of this workshop was therefore to provide a forum for a dialogue and exchange of views. A follow-up workshop in October 1989, with C. H. Stapper from IBM and V. K. Jain from the University of South Florida as general co-chairmen, is being organized.
„Über diesen Titel“ kann sich auf eine andere Ausgabe dieses Titels beziehen.
EUR 160,44
EUR 29,29 für den Versand von Vereinigtes Königreich nach Deutschland
Versandziele, Kosten & DauerNeu kaufen
Diesen Artikel anzeigen
EUR 92,27
Gratis für den Versand innerhalb von/der Deutschland
Versandziele, Kosten & DauerWeitere beliebte Ausgaben desselben Titels
Suchergebnisse für Defect and Fault Tolerance in VLSI Systems: Volume...
Foto des Verkäufers
Defect and Fault Tolerance in VLSI Systems
Print-on-DemandAnbieter: moluna, Greven, Deutschland
Verkäuferbewertung 5 von 5 Sternen
Zustand: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. This book contains an edited selection of papers presented at the International Workshop on Defect and Fault Tolerance in VLSI Systems held October 6-7, 1988 in Springfield, Massachusetts. Our thanks go to all the contributors and especially the members of . Bestandsnummer des Verkäufers 4200161
Anzahl: Mehr als 20 verfügbar
Foto des Verkäufers
Defect and Fault Tolerance in VLSI Systems
Print-on-DemandAnbieter: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Deutschland
Verkäuferbewertung 5 von 5 Sternen
Taschenbuch. Zustand: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book contains an edited selection of papers presented at the International Workshop on Defect and Fault Tolerance in VLSI Systems held October 6-7, 1988 in Springfield, Massachusetts. Our thanks go to all the contributors and especially the members of the program committee for the difficult and time-consuming work involved in selecting the papers that were presented in the workshop and reviewing the papers included in this book. Thanks are also due to the IEEE Computer Society (in particular, the Technical Committee on Fault-Tolerant Computing and the Technical Committee on VLSI) and the University of Massachusetts at Amherst for sponsoring the workshop, and to the National Science Foundation for supporting (under grant number MIP-8803418) the keynote address and the distribution of this book to all workshop attendees. The objective of the workshop was to bring t. ogether researchers and practition ers from both industry and academia in the field of defect tolerance and yield en ha. ncement in VLSI to discuss their mutual interests in defect-tolerant architectures and models for integrated circuit defects, faults, and yield. Progress in this area was slowed down by the proprietary nature of yield-related data, and by the lack of appropriate forums for disseminating such information. The goal of this workshop was therefore to provide a forum for a dialogue and exchange of views. A follow-up workshop in October 1989, with C. H. Stapper from IBM and V. K. Jain from the University of South Florida as general co-chairmen, is being organized. 380 pp. Englisch. Bestandsnummer des Verkäufers 9781461568018
Anzahl: 2 verfügbar
Foto des Verkäufers
Defect and Fault Tolerance in VLSI Systems
Verlag:
Springer US, Springer New York Jun 2012, 2012
ISBN 10: 1461568013
ISBN 13: 9781461568018
Neu
Taschenbuch
Anbieter: buchversandmimpf2000, Emtmannsberg, BAYE, Deutschland
Verkäuferbewertung 5 von 5 Sternen
Taschenbuch. Zustand: Neu. This item is printed on demand - Print on Demand Titel. Neuware -This book contains an edited selection of papers presented at the International Workshop on Defect and Fault Tolerance in VLSI Systems held October 6-7, 1988 in Springfield, Massachusetts. Our thanks go to all the contributors and especially the members of the program committee for the difficult and time-consuming work involved in selecting the papers that were presented in the workshop and reviewing the papers included in this book. Thanks are also due to the IEEE Computer Society (in particular, the Technical Committee on Fault-Tolerant Computing and the Technical Committee on VLSI) and the University of Massachusetts at Amherst for sponsoring the workshop, and to the National Science Foundation for supporting (under grant number MIP-8803418) the keynote address and the distribution of this book to all workshop attendees. The objective of the workshop was to bring t. ogether researchers and practition ers from both industry and academia in the field of defect tolerance and yield en ha. ncement in VLSI to discuss their mutual interests in defect-tolerant architectures and models for integrated circuit defects, faults, and yield. Progress in this area was slowed down by the proprietary nature of yield-related data, and by the lack of appropriate forums for disseminating such information. The goal of this workshop was therefore to provide a forum for a dialogue and exchange of views. A follow-up workshop in October 1989, with C. H. Stapper from IBM and V. K. Jain from the University of South Florida as general co-chairmen, is being organized.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 380 pp. Englisch. Bestandsnummer des Verkäufers 9781461568018
Anzahl: 1 verfügbar
Foto des Verkäufers
Defect and Fault Tolerance in VLSI Systems : Volume 1
Anbieter: AHA-BUCH GmbH, Einbeck, Deutschland
Verkäuferbewertung 5 von 5 Sternen
Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book contains an edited selection of papers presented at the International Workshop on Defect and Fault Tolerance in VLSI Systems held October 6-7, 1988 in Springfield, Massachusetts. Our thanks go to all the contributors and especially the members of the program committee for the difficult and time-consuming work involved in selecting the papers that were presented in the workshop and reviewing the papers included in this book. Thanks are also due to the IEEE Computer Society (in particular, the Technical Committee on Fault-Tolerant Computing and the Technical Committee on VLSI) and the University of Massachusetts at Amherst for sponsoring the workshop, and to the National Science Foundation for supporting (under grant number MIP-8803418) the keynote address and the distribution of this book to all workshop attendees. The objective of the workshop was to bring t. ogether researchers and practition ers from both industry and academia in the field of defect tolerance and yield en ha. ncement in VLSI to discuss their mutual interests in defect-tolerant architectures and models for integrated circuit defects, faults, and yield. Progress in this area was slowed down by the proprietary nature of yield-related data, and by the lack of appropriate forums for disseminating such information. The goal of this workshop was therefore to provide a forum for a dialogue and exchange of views. A follow-up workshop in October 1989, with C. H. Stapper from IBM and V. K. Jain from the University of South Florida as general co-chairmen, is being organized. Bestandsnummer des Verkäufers 9781461568018
Anzahl: 1 verfügbar
Beispielbild für diese ISBN
Defect and Fault Tolerance in VLSI Systems: Volume 1
Anbieter: Ria Christie Collections, Uxbridge, Vereinigtes Königreich
Verkäuferbewertung 5 von 5 Sternen
Zustand: New. In. Bestandsnummer des Verkäufers ria9781461568018_new
Anzahl: Mehr als 20 verfügbar
Beispielbild für diese ISBN
Defect and Fault Tolerance in VLSI Systems: Volume 1
Anbieter: Chiron Media, Wallingford, Vereinigtes Königreich
Verkäuferbewertung 5 von 5 Sternen
PF. Zustand: New. Bestandsnummer des Verkäufers 6666-IUK-9781461568018
Anzahl: 10 verfügbar
Beispielbild für diese ISBN
Defect and Fault Tolerance in VLSI Systems: Volume 1
Verlag:
Springer-Verlag New York Inc., 2012
ISBN 10: 1461568013
ISBN 13: 9781461568018
Neu
Paperback / softback
Anbieter: THE SAINT BOOKSTORE, Southport, Vereinigtes Königreich
Verkäuferbewertung 5 von 5 Sternen
Paperback / softback. Zustand: New. This item is printed on demand. New copy - Usually dispatched within 5-9 working days 751. Bestandsnummer des Verkäufers C9781461568018
Anzahl: Mehr als 20 verfügbar
Beispielbild für diese ISBN
Defect and Fault Tolerance in VLSI Systems: Volume 1
Anbieter: Revaluation Books, Exeter, Vereinigtes Königreich
Verkäuferbewertung 5 von 5 Sternen
Paperback. Zustand: Brand New. reprint edition. 374 pages. 9.45x6.61x0.86 inches. In Stock. Bestandsnummer des Verkäufers x-1461568013
Anzahl: 2 verfügbar
Beispielbild für diese ISBN
Defect and Fault Tolerance in VLSI Systems: Volume 1
Anbieter: Lucky's Textbooks, Dallas, TX, USA
Verkäuferbewertung 5 von 5 Sternen
Zustand: New. Bestandsnummer des Verkäufers ABLIING23Mar2716030037922
Anzahl: Mehr als 20 verfügbar
Beispielbild für diese ISBN
Defect and Fault Tolerance in VLSI Systems: Volume 1
Anbieter: dsmbooks, Liverpool, Vereinigtes Königreich
Verkäuferbewertung 4 von 5 Sternen
Paperback. Zustand: Like New. Like New. book. Bestandsnummer des Verkäufers D8F0-0-M-1461568013-6
Anzahl: 1 verfügbar