CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies

Manoj Sachdev

ISBN 10: 904817855X / ISBN 13: 9789048178551

Verlag: Springer Netherlands, Springer Netherlands Okt 2010, 2010

Beschreibung

Neuware -CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies covers a broad range of topics related to SRAM design and test. From SRAM operation basics through cell electrical and physical design to process-aware and economical approach to SRAM testing. The emphasis of the book is on challenges and solutions of stability testing as well as on development of understanding of the link between the process technology and SRAM circuit design in modern nano-scaled technologies.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 212 pp. Englisch.

Bestandsnummer des Verkäufers 9789048178551

Bibliografische Details

• Titel: CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies
• Verlag: Springer Netherlands, Springer Netherlands Okt 2010
• Erscheinungsjahr: 2010
• Sprache: Englisch
• ISBN-10: 904817855X
• ISBN-13: 9789048178551
• Einband: Taschenbuch
• Zustand: Neu
• Abmessungen: 235B x 155 H x 12 T Millimeter Breite: 235 mm, Höhe: 155 mm, Tiefe: 12 mm
• Gewicht: 330 Gramm

Über diesen Titel

Inhaltsangabe

This book covers a broad range of topics related to SRAM design and testing. It includes everything from SRAM operation basics through cell electrical and physical design to process-aware and economical approach to SRAM testing.

Über die Autorin bzw. den Autor

Prof. Sachdev has authored several successful books with Springer