Integrated Circuit Defect-Sensitivity: Theory and Computational Models

José Pineda de Gyvez

ISBN 10: 1461363837 / ISBN 13: 9781461363835

Verlag: Springer US, Springer New York Feb 2014, 2014

Beschreibung

This item is printed on demand - Print on Demand Titel. Neuware -The history of this book begins way back in 1982. At that time a research proposal was filed with the Dutch Foundation for Fundamental Research on Matter concerning research to model defects in the layer structure of integrated circuits. It was projected that the results may be useful for yield estimates, fault statistics and for the design of fault tolerant structures. The reviewers were not in favor of this proposal and it disappeared in the drawers. Shortly afterwards some microelectronics industries realized that their survival may depend on a better integration between technology-and design-laboratories. For years the 'silicon foundry' concept had suggested a fairly rigorous separation between the two areas. The expectation was that many small design companies would share the investment into the extremely costful Silicon fabrication plants while designing large lots of application-specific integrated circuits (ASIC's). Those fabrication plants would be concentrated with only a few market leaders.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 196 pp. Englisch.

Bestandsnummer des Verkäufers 9781461363835

Bibliografische Details

• Titel: Integrated Circuit Defect-Sensitivity: Theory and Computational Models
• Verlag: Springer US, Springer New York Feb 2014
• Erscheinungsjahr: 2014
• Sprache: Englisch
• ISBN-10: 1461363837
• ISBN-13: 9781461363835
• Einband: Taschenbuch
• Zustand: Neu
• Abmessungen: 235B x 155 H x 11 T Millimeter Breite: 235 mm, Höhe: 155 mm, Tiefe: 11 mm
• Gewicht: 306 Gramm

Über diesen Titel

Inhaltsangabe

The history of this book begins way back in 1982. At that time a research proposal was filed with the Dutch Foundation for Fundamental Research on Matter concerning research to model defects in the layer structure of integrated circuits. It was projected that the results may be useful for yield estimates, fault statistics and for the design of fault tolerant structures. The reviewers were not in favor of this proposal and it disappeared in the drawers. Shortly afterwards some microelectronics industries realized that their survival may depend on a better integration between technology-and design-laboratories. For years the "silicon foundry" concept had suggested a fairly rigorous separation between the two areas. The expectation was that many small design companies would share the investment into the extremely costful Silicon fabrication plants while designing large lots of application-specific integrated circuits (ASIC’s). Those fabrication plants would be concentrated with only a few market leaders.