Reuse Methodology Manual for System-On-A-Chip Designs

Bricaud, Pierre:

ISBN 10: 0792381750 / ISBN 13: 9780792381754

Verlag: Springer 30.06.1998., 1998

Beschreibung

224 Seiten ex Library Book / aus einer wissenschafltichen Bibliothek / Sprache: Englisch Gewicht in Gramm: 540 24,1 x 15,7 x 2,0 cm, Gebundene Ausgabe. Bestandsnummer des Verkäufers 372213

Bibliografische Details

Titel: Reuse Methodology Manual for ...

Verlag: Springer 30.06.1998.

Erscheinungsdatum: 1998

Einband: Hardcover

Zustand: Sehr gut

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Inhaltsangabe:

Book by Keating Michael Bricaud Pierre

Reseña del editor:

Silicon technology now allows us to build chips consisting of many millions of transistors. This technology promises new levels of system integration onto a single chip, but also presents significant challenges to the chip designer. As a result, many ASIC developers and silicon vendors are re-examining their design methodologies, searching for ways to make effective use of the huge numbers of gates now available. These designers see modern design tools and methodologies as inadequate for developing million-gate ASICs from scratch. There is considerable pressure to keep design team size and design schedules constant while design complexities grow. Tools are not providing the productivity gains required to keep pace with the increasing gate counts available from deep submicron technology. Design reuse - the use of pre-designed and pre-verified cores - is the most promising opportunity to bridge the gap between available gate-count and designer productivity. This text outlines an effective methodology for creating reusable designs for use in a System-on-a-Chip (SoC) design methodology. Silicon and tool technologies move so quickly that no single methodology can provide a permanent solution to this highly dynamic problem. Instead, this manual is an attempt to capture and incrementally improve on current best practices in the industry, and to give a coherent, integrated view of the design process.