Sprache: Englisch
Verlag: Morgan & Claypool Publishers, 2018
ISBN 10: 1681733854 ISBN 13: 9781681733852
Anbieter: suffolkbooks, Center moriches, NY, USA
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Sprache: Englisch
Verlag: Morgan & Claypool Publishers, 2016
ISBN 10: 1627058540 ISBN 13: 9781627058544
Anbieter: suffolkbooks, Center moriches, NY, USA
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Sprache: Englisch
Verlag: Morgan & Claypool Publishers, 2016
ISBN 10: 1627058540 ISBN 13: 9781627058544
Anbieter: Our Kind Of Books, Liphook, Vereinigtes Königreich
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In den WarenkorbSoft cover. Zustand: As New. This book has been in storage since publication and is unread. Hence the description as new .
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Sprache: Englisch
Verlag: Morgan & Claypool Publishers, "Synthesis Lectures on Emerging Engineering Technologies" series, [San Raphael, CA], 2018
ISBN 10: 1681733870 ISBN 13: 9781681733876
Anbieter: Philip Gibbons Books, Newcastle Emlyn, Vereinigtes Königreich
Erstausgabe
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In den WarenkorbHardcover/Hardback. Zustand: As New. No Jacket. First edition. Digital edition: this copy printed in UK. Quarto-size, 92 pages (xii, 80), graphs, mathematical notation; publisher's pale blue laminated covers; Issued without jacket.
Zustand: New. 1st edition NO-PA16APR2015-KAP.
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In den WarenkorbZustand: New. In English.
Anbieter: Chiron Media, Wallingford, Vereinigtes Königreich
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In den WarenkorbZustand: New. In English.
Sprache: Englisch
Verlag: Morgan & Claypool Publishers, 2018
ISBN 10: 1681733870 ISBN 13: 9781681733876
Anbieter: Leopolis, Kraków, Polen
Hardcover. Zustand: New. 8vo (24.5 cm), XI, 77 pp. Publisher's laminated boards. Synopsis: This book is the first to illustrate the fact that a single subthreshold slope value which is generally reported in textbook plots and research articles, is erroneous and at lower gate voltage below inversion, subthreshold slope value exhibits a variation tendency on applied gate voltage below threshold, i.e., varying depletion layer and vertical field induced surface band bending variations at the MOSFET channel surface. The author also will critically review the state-of-the art effectiveness of certain device architectures presently prevalent in the semiconductor industry below 45 nm node from the perspectives of device physical analysis at lower substrate temperature operating conditions. The book concludes with an emphasis on modeling simulations, inviting the device professionals to meet the performance bottlenecks emanating from inceptives present at these lower temperatures of operation of today's 10 nm device architectures.
Anbieter: GreatBookPrices, Columbia, MD, USA
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Anbieter: Chiron Media, Wallingford, Vereinigtes Königreich
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In den WarenkorbPF. Zustand: New.
Zustand: New. 1st edition NO-PA16APR2015-KAP.
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In den WarenkorbZustand: New.
Sprache: Englisch
Verlag: Springer International Publishing AG, Cham, 2025
ISBN 10: 3031842855 ISBN 13: 9783031842856
Anbieter: Grand Eagle Retail, Bensenville, IL, USA
Hardcover. Zustand: new. Hardcover. Parameters that determine the performance of silicon-based Field Effect Transistors (FET) devices in the presence of degenerate doping, often are not modeled properly and so require precise analysis to improve modeling accuracy. The book is focused on the extraction of parameters for silicon-based FET models that critically determine the FET performance at room temperature as well as at very low temperatures. Emphasize is put on analysis that is based on the device physics, especially at low (cryogenic) temperatures. Performance of gate-all-around (GAA) nanowire FETs, and stacked nanosheet complementary FETs (C-FET) are also discussed. Parameters that determine the performance of silicon-based Field Effect Transistors (FET) devices in the presence of degenerate doping, often are not modeled properly and so require precise analysis to improve modeling accuracy. Shipping may be from multiple locations in the US or from the UK, depending on stock availability.
Anbieter: GreatBookPricesUK, Woodford Green, Vereinigtes Königreich
EUR 42,88
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In den WarenkorbZustand: As New. Unread book in perfect condition.
Anbieter: Books Puddle, New York, NY, USA
Zustand: New.
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In den WarenkorbHardcover. Zustand: Brand New. 175 pages. 9.45x6.62x9.20 inches. In Stock.
Sprache: Englisch
Verlag: Springer International Publishing, Springer International Publishing, 2016
ISBN 10: 3031008995 ISBN 13: 9783031008993
Anbieter: AHA-BUCH GmbH, Einbeck, Deutschland
Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - In order to sustain Moore's Law-based device scaling, principal attention has focused on toward device architectural innovations for improved device performance as per ITRS projections for technology nodes up to 10 nm. Efficient integration of lower substrate temperatures (.
Sprache: Englisch
Verlag: Springer International Publishing, Springer International Publishing Jul 2018, 2018
ISBN 10: 3031009061 ISBN 13: 9783031009068
Anbieter: buchversandmimpf2000, Emtmannsberg, BAYE, Deutschland
Taschenbuch. Zustand: Neu. Neuware -Low substrate/lattice temperature (Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 92 pp. Englisch.
Sprache: Englisch
Verlag: Springer International Publishing, 2018
ISBN 10: 3031009061 ISBN 13: 9783031009068
Anbieter: AHA-BUCH GmbH, Einbeck, Deutschland
Taschenbuch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - Low substrate/lattice temperature (< 300 K) operation of n-MOSFET has been effectively studied by device research and integration professionals in CMOS logic and analog products from the early 1970s. The author of this book previously composed an Elektronisches Buch in this area where he and his co-authors performed original simulation and modeling work on MOSFET threshold voltage and demonstrated that through efficient manipulation of threshold voltage values at lower substrate temperatures, superior degrees of reduction of subthreshold and off-state leakage current can be implemented in high-density logic and microprocessor chips fabricated in a silicon die. In this book, the author explores other device parameters such as channel inversion carrier mobility and its characteristic evolution as temperature on the die varies from 100-300 K. Channel mobility affects both on-state drain current and subthreshold drain current and both drain current behaviors at lower temperatures have been modeled accurately and simulated for a 1 m channel length n-MOSFET. In addition, subthreshold slope which is an indicator of how speedily the device drain current can be switched between near off current and maximum drain current is an important device attribute to model at lower operating substrate temperatures. This book is the first to illustrate the fact that a single subthreshold slope value which is generally reported in textbook plots and research articles, is erroneous and at lower gate voltage below inversion, subthreshold slope value exhibits a variation tendency on applied gate voltage below threshold, i.e., varying depletion layer and vertical field induced surface band bending variations at the MOSFET channel surface. The author also will critically review the state-of-the art effectiveness of certain device architectures presently prevalent in the semiconductor industry below 45 nm node from the perspectives of device physical analysis at lower substrate temperature operating conditions. The book concludes with an emphasis on modeling simulations, inviting the device professionals to meet the performance bottlenecks emanating from inceptives present at these lower temperatures of operation of today's 10 nm device architectures.
Sprache: Englisch
Verlag: Springer Nature Switzerland, Springer Nature Switzerland, 2025
ISBN 10: 3031842855 ISBN 13: 9783031842856
Anbieter: AHA-BUCH GmbH, Einbeck, Deutschland
Buch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - Parameters that determine the performance of silicon-based Field Effect Transistors (FET) devices in the presence of degenerate doping, often are not modeled properly and so require precise analysis to improve modeling accuracy. The book is focused on the extraction of parameters for silicon-based FET models that critically determine the FET performance at room temperature as well as at very low temperatures. Emphasize is put on analysis that is based on the device physics, especially at low (cryogenic) temperatures. Performance of gate-all-around (GAA) nanowire FETs, and stacked nanosheet complementary FETs (C-FET) are also discussed.
Anbieter: Majestic Books, Hounslow, Vereinigtes Königreich
EUR 39,95
Anzahl: 4 verfügbar
In den WarenkorbZustand: New. Print on Demand.
Anbieter: Biblios, Frankfurt am main, HESSE, Deutschland
Zustand: New. PRINT ON DEMAND.
Sprache: Englisch
Verlag: Springer International Publishing Feb 2016, 2016
ISBN 10: 3031008995 ISBN 13: 9783031008993
Anbieter: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Deutschland
Taschenbuch. Zustand: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -In order to sustain Moore's Law-based device scaling, principal attention has focused on toward device architectural innovations for improved device performance as per ITRS projections for technology nodes up to 10 nm. Efficient integration of lower substrate temperatures ( 84 pp. Englisch.
Anbieter: Majestic Books, Hounslow, Vereinigtes Königreich
EUR 47,35
Anzahl: 4 verfügbar
In den WarenkorbZustand: New. Print on Demand.
Sprache: Englisch
Verlag: Springer International Publishing Jul 2018, 2018
ISBN 10: 3031009061 ISBN 13: 9783031009068
Anbieter: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Deutschland
Taschenbuch. Zustand: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Low substrate/lattice temperature (< 300 K) operation of n-MOSFET has been effectively studied by device research and integration professionals in CMOS logic and analog products from the early 1970s. The author of this book previously composed an Elektronisches Buch in this area where he and his co-authors performed original simulation and modeling work on MOSFET threshold voltage and demonstrated that through efficient manipulation of threshold voltage values at lower substrate temperatures, superior degrees of reduction of subthreshold and off-state leakage current can be implemented in high-density logic and microprocessor chips fabricated in a silicon die. In this book, the author explores other device parameters such as channel inversion carrier mobility and its characteristic evolution as temperature on the die varies from 100-300 K. Channel mobility affects both on-state drain current and subthreshold drain current and both drain current behaviors at lower temperatures have been modeled accurately and simulated for a 1 m channel length n-MOSFET. In addition, subthreshold slope which is an indicator of how speedily the device drain current can be switched between near off current and maximum drain current is an important device attribute to model at lower operating substrate temperatures. This book is the first to illustrate the fact that a single subthreshold slope value which is generally reported in textbook plots and research articles, is erroneous and at lower gate voltage below inversion, subthreshold slope value exhibits a variation tendency on applied gate voltage below threshold, i.e., varying depletion layer and vertical field induced surface band bending variations at the MOSFET channel surface. The author also will critically review the state-of-the art effectiveness of certain device architectures presently prevalent in the semiconductor industry below 45 nm node from the perspectives of device physical analysis at lower substrate temperature operating conditions. The book concludes with an emphasis on modeling simulations, inviting the device professionals to meet the performance bottlenecks emanating from inceptives present at these lower temperatures of operation of today's 10 nm device architectures. 92 pp. Englisch.
Anbieter: Biblios, Frankfurt am main, HESSE, Deutschland
Zustand: New. PRINT ON DEMAND.
Anbieter: Majestic Books, Hounslow, Vereinigtes Königreich
EUR 58,77
Anzahl: 4 verfügbar
In den WarenkorbZustand: New. Print on Demand.
Sprache: Englisch
Verlag: Springer Nature Switzerland, Springer International Publishing Mär 2025, 2025
ISBN 10: 3031842855 ISBN 13: 9783031842856
Anbieter: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Deutschland
Buch. Zustand: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Parameters that determine the performance of silicon-based Field Effect Transistors (FET) devices in the presence of degenerate doping, often are not modeled properly and so require precise analysis to improve modeling accuracy. The book is focused on the extraction of parameters for silicon-based FET models that critically determine the FET performance at room temperature as well as at very low temperatures. Emphasize is put on analysis that is based on the device physics, especially at low (cryogenic) temperatures. Performance of gate-all-around (GAA) nanowire FETs, and stacked nanosheet complementary FETs (C-FET) are also discussed. 152 pp. Englisch.