9780792397342 - Synthesis of Power Distribution to Manage Signal Integrity in Mixed-Signal ICs von Stanisic, Balsha R.; Rutenbar, Rob A.; Carley, L. Richard (19 Ergebnisse)

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Zustand: Très bon. Synthesis of Power Distribution to Manage Signal Integrity in Mixed-Signal Ics| Stanisic, Balsha R.; Rutenbar, Rob A.; Carley, L. Richard | Kluwer, 1996. In-8° cartonné, 206p . Couverture propre . Dos solide. Intérieur frais sans soulignage ou annotation. Exemplaire de bibliothèque : petit code barre en pied de 1re de couv., cotation au dos, rares et discrets petits tampons à l'intérieur de l'ouvrage.Très bon état général pour cet ouvrage. [Ba 52] Pour les expéditions internationales, nous consulter au préalable pour l ajustement des frais de port qui seront peut-être revus à la baisse/ For international shipments, please contact us in advance to adjust shipping costs. |.

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Zustand: New. Describes algorithms for analog power distribution synthesis and demonstrates their effectiveness. This book addresses power distribution synthesis for mixed-signal integrated circuits. It also describes several key challenges in power distribution design are identified and automated methods to overcome them. Num Pages: 208 pages, biography. BIC Classification: TJFC. Category: (P) Professional & Vocational. Dimension: 234 x 156 x 14. Weight in Grams: 509. . 1996. 1996th Edition. hardcover. . . . .

Zustand: Gut. Zustand: Gut | Sprache: Englisch | Produktart: Bücher | In the early days of VLSI, the design of the power distribution for an integrated cir­ cuit was rather simple. Power distribution --the design of the geometric topology for the network of wires that connect the various power supplies, the widths of the indi­ vidual segments for each of these wires, the number and location of the power I/O pins around the periphery of the chip --was simple because the chips were simpler. Few available wiring layers forced floorplans that allowed simple, planar (non-over­ lapping) power networks. Lower speeds and circuit density made the choice of the wire widths easier: we made them just fat enough to avoid resistive voltage drops due to switching currents in the supply network. And we just didn't need enormous num­ bers of power and ground pins on the package for the chips to work. It's not so simple any more. Increased integration has forced us to focus on reliability concerns such as metal elec­ tromigration, which affects wire sizing decisions in the power network. Extra metal layers have allowed more flexibility in the topological layout of the power networks.

Zustand: New. Describes algorithms for analog power distribution synthesis and demonstrates their effectiveness. This book addresses power distribution synthesis for mixed-signal integrated circuits. It also describes several key challenges in power distribution design are identified and automated methods to overcome them. Num Pages: 208 pages, biography. BIC Classification: TJFC. Category: (P) Professional & Vocational. Dimension: 234 x 156 x 14. Weight in Grams: 509. . 1996. 1996th Edition. hardcover. . . . . Books ship from the US and Ireland.

Buch. Zustand: Neu. Druck auf Anfrage Neuware - Printed after ordering - In the early days of VLSI, the design of the power distribution for an integrated cir cuit was rather simple. Power distribution --the design of the geometric topology for the network of wires that connect the various power supplies, the widths of the indi vidual segments for each of these wires, the number and location of the power I/O pins around the periphery of the chip --was simple because the chips were simpler. Few available wiring layers forced floorplans that allowed simple, planar (non-over lapping) power networks. Lower speeds and circuit density made the choice of the wire widths easier: we made them just fat enough to avoid resistive voltage drops due to switching currents in the supply network. And we just didn't need enormous num bers of power and ground pins on the package for the chips to work. It's not so simple any more. Increased integration has forced us to focus on reliability concerns such as metal elec tromigration, which affects wire sizing decisions in the power network. Extra metal layers have allowed more flexibility in the topological layout of the power networks.

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Buch. Zustand: Neu. Synthesis of Power Distribution to Manage Signal Integrity in Mixed-Signal ICs | Balsha R. Stanisic (u. a.) | Buch | xxii | Englisch | 1996 | Springer US | EAN 9780792397342 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu Print on Demand.

Buch. Zustand: Neu. This item is printed on demand - Print on Demand Titel. Neuware -In the early days of VLSI, the design of the power distribution for an integrated cir cuit was rather simple. Power distribution --the design of the geometric topology for the network of wires that connect the various power supplies, the widths of the indi vidual segments for each of these wires, the number and location of the power I/O pins around the periphery of the chip --was simple because the chips were simpler. Few available wiring layers forced floorplans that allowed simple, planar (non-over lapping) power networks. Lower speeds and circuit density made the choice of the wire widths easier: we made them just fat enough to avoid resistive voltage drops due to switching currents in the supply network. And we just didn't need enormous num bers of power and ground pins on the package for the chips to work. It's not so simple any more. Increased integration has forced us to focus on reliability concerns such as metal elec tromigration, which affects wire sizing decisions in the power network. Extra metal layers have allowed more flexibility in the topological layout of the power networks.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 236 pp. Englisch.

Buch. Zustand: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -In the early days of VLSI, the design of the power distribution for an integrated cir cuit was rather simple. Power distribution --the design of the geometric topology for the network of wires that connect the various power supplies, the widths of the indi vidual segments for each of these wires, the number and location of the power I/O pins around the periphery of the chip --was simple because the chips were simpler. Few available wiring layers forced floorplans that allowed simple, planar (non-over lapping) power networks. Lower speeds and circuit density made the choice of the wire widths easier: we made them just fat enough to avoid resistive voltage drops due to switching currents in the supply network. And we just didn't need enormous num bers of power and ground pins on the package for the chips to work. It's not so simple any more. Increased integration has forced us to focus on reliability concerns such as metal elec tromigration, which affects wire sizing decisions in the power network. Extra metal layers have allowed more flexibility in the topological layout of the power networks. 236 pp. Englisch.